TSMC’s 3D-IC Advanced Connectivity design team is looking for top-talent circuit design engineers to help develop the next generation of wireline communication IP. We are looking for design engineers who can work as part of an highly innovative and high performance design team, working together to develop speed/power optimized solutions for die-to-die communication.
As a design engineer, you will be responsible for micro-architecture, circuit definition, circuit design, simulation, and post-layout verification for various components related to the electrical layers within the wireline communication IP.
- 3 – 8 years of direct experience, prefer individuals with experience taking chips to production.
- Solid foundation of transistor level design and fundamentals
- Understanding of basic analog circuit building blocks; filters, bandgap references, biasing circuits, LDO regulators, OpAmps, comparators and switched-cap circuits
- Knowledge of analog circuit design concepts; feedback loop theory, mismatch, linearity, stability, low-power and low-noise techniques
- Experience with IC development from definition to production including layout supervision, lab evaluation and characterization
- Knowledge and Experience with DDR, PCI, SerDes is strongly preferred
- Experience with Verilog-A/AMS behavioral modeling is preferred
Apply for job
To view the job application please visit tsmc.taleo.net.