AI Hardware Research Intern: Advanced Memory Modeling and Simulation for AI Accelerators

Overview of Role

TSMC Corporate Research Organization is seeking a talented and motivated individual to join our team this Summer/Fall as an AI hardware research intern for 2025. You will be part of our research team, focusing on a cutting-edge project related to memory modeling and simulation for AI accelerators. This is a unique opportunity to gain hands-on experience on memory optimization for AI workloads. This position is in TSMC San Jose office, and we are currently operating in a hybrid work schedule with 4 days in office.

Responsibilities

• Memory architecture optimization for AI to maximize the bandwidth and energy efficiency
• 3D memory modeling, simulation, and design space exploration

Minimum Qualifications

• Ph.D. Student in EE or CS
• Hands-on experience on:
  • SRAM/DRAM/eNVM and related simulators
  • Memory peripheral circuit design and simulation
• Other relevant experience on:
  • 3D memory such as HBM, HMC or Wide IO
  • 2.5D/3D packaging, TSV, and thermal analysis

Preferred Qualifications

• Quick learner
• Problem solver with minimal supervision
• Creative
• Self-driven and proactive
• Team player
• Excellent communicator

Company Description  

As a trusted technology and capacity provider, TSMC is driven by the desire to be:

• The world’s leading dedicated semiconductor foundry
• The technology leader with a strong reputation for manufacturing excellence
• Advancing semiconductor manufacturing innovations to enable the future of technology