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AI Frontend RTL Design Engineer

AI Frontend RTL Design Engineer
by Admin on 07-25-2022 at 2:16 pm

Website Flex Logix

Flex Logix is the leading provider of reconfigurable computing technology for both AI inference and eFPGA IP solutions.  Our offerings push the leading edge of hardware, software and system design; pioneering new approaches to important problems.

  • Our InferX X1 is the industry’s most-efficient AI edge inference accelerator that brings AI to the masses in high-volume applications by providing a new silicon efficient dynamic logic paradigm for inference processing. InferX achieves GPU-level inference performance with a fraction of the die area and memory footprint.
  • Our EFLX embedded FPGA (eFPGA) IP enables any SOC design to flexibly handle changing protocols, standards, algorithms, and customer requirements and enables reconfigurable accelerators that speeds key workloads up to 1000x compared to a general purpose processor. EFLX eFPGA is available in a wide range of process technologies and supports designs ranging from low cost microcontrollers to 5G baseband processing solutions.

Flex Logix is seeking a RTL/Frontend Design Engineer to join our team developing/migrating the RTL of the eFPGA and the next-generation InferX solutions.


The candidate must be able to work in the architecture/frontend stage of silicon development: specification, coding, some verification, and some synthesis support for the

  • Flex-Logix in-house interconnect switch/bitcell modeling.
  • eFPGA reconfigurable building block (RBB), block memory (BRAM), and IP netlist.
  • InferX reconfigurable tensor processor block.
  • InferX high-speed configurator.
  • MBIST/Repair RTL generation for memory IPs.

Required Experience  

  • BS/MSEE/CE/CS with a minimum of 3 years of experience in RTL design or functional verification.
  • Experience with starting designs from scratch.
  • Extensive experience coding Verilog, running simulation, and debugging simulation failure.
  • Experience interfacing with internal and 3rd party IP suppliers.
  • Experience running Lint, CDC, and other static quality checks.
  • Working knowledge of System Verilog.
  • Experience scripting in Python or Perl.
  • Work effectively with the verification team to deliver a high-quality RTL which is easy to maintain, scalable, and with high-speed performance.
  • Must be passionate about doing this job: wanting to change the world and work hard doing it.
  • Must be entrepreneurial in spirit and an innovative problem solver.

Preferred Experience 

  • Knowledge of computer architecture, especially in systolic arrays.
  • Familiarity with memory architecture in SoCs – Experience with DDR and PCIe standards.
  • Experience with FPGA design and emulation.
  • Experience with FPGA and ASIC EDA tools.
  • Experience interfacing with back-end teams (silicon engineering).
  • Familiarity with C or C++ coding.
  • Experience with DMA, DDR controllers, NoC configuration, and other 3rd party IP.
  • Logic/physical synthesis of RTL.

We are looking for passionate team members, to be part of an aggressive, venture-backed startup team that is changing chip architecture. Must be entrepreneurial, innovative problem solver, willing to work hard and have fun.

As we continue to grow and expand our company, we are hiring for all office locations. You must live near one of our main offices located in: Mountain View (CA), Austin (TX), Chicago (IL) or Vancouver (BC). We offer a flexible work schedule.

You must have US citizenship or permanent residency (“green card”) or hold a current H1-B visa to work in United States.

Flex Logix recruits, employs, trains, compensates and promotes regardless of race, religion, color, national origin, sex, disability, age, veteran status, and other protected status as required by applicable law.

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To view the job application please visit

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