Lab and Characterization System Engineer (6410-1006)

Achronix is a privately held fabless corporation based in Santa Clara, California and offers high-performance FPGA solutions. Achronix’s history is one of pushing the boundaries in the high-performance FPGA market. Achronix offerings include programmable FPGA fabrics, discrete high-performance and high-density FPGAs with hardwired system-level blocks, data center and HPC hardware accelerator boards, and best-in-class EDA software supporting all Achronix products.
Job Description/Responsibilities
Define, lead, and execute device characterization activities for high speed serial and memory interfaces, including the definition and execution of tests with modern test equipment including TDRs, VNAs, sampling and real-time oscilloscopes, etc.
Setup and manage the Achronix Systems & Hardware Engineering lab, including procuring lab equipment to enable FPGA device bring-up and characterization, with the immediate focus being the Speedster7t FPGA family.
Implement lab automation to support bring-up and characterization, including the scripting of test equipment to automate test and characterization tasks, including contributing to Achronix internal automated test platforms.
Develop and support an automated hardware regression platform for Achronix devices, including a mix of hardware and software development.
Conduct demonstrations of Achronix technology for customers and partners.
Support applications teams and third-party vendors in providing guidance on Achronix device high -peed interfaces and memory configuration and use.
Preferred Skills
Experience with device bring-up, including PCI Express, DDR, and Ethernet interfaces.
Experience with the characterization of SerDes and high-speed serial interfaces.
Experience with electronic test equipment, such as Oscilloscopes, BERTs, TDRs, etc.
Experience with software such as TCL, Python, C, or C++ for test equipment control. Experience with SQL databases is a plus.
Ideally has a working knowledge of signal and power integrity principles, and has hands-on experience with S-parameters, transmission lines, and impedance profiles.
Ideally has experience developing FPGA logic and platforms design for protocol bring-up and test.
Good communication skills and ability to multi-task.
Education and Experience
At least 5 years’ experience, with a focus on device bring-up, characterization, and debug.
Experience with lab test equipment, specifically those needed for protocol bring-up: oscilloscopes, function generators, logic analyzers, BERTs, back planes, etc.
Bachelor’s or Master’s degree in EE, CE or equivalent work experience.