The First Real RISC-V AI Laptop

At a workshop in Boston on February 27, something subtle but important happened. Developers sat down in front of a RISC-V laptop, installed Fedora, and ran a local large language model. No simulation. No dev board tethered to a monitor. A laptop.

For more than a decade, RISC-V advocates have promised that the open instruction set would eventually reach mainstream computing devices. Until now the reality has mostly been evaluation boards, embedded systems, and research platforms. The ROMA II laptop changes that equation. Developers can treat it like a normal PC—boot it, install Linux, run software, try AI. The Boston event, part of World RISC-V Days and co-sponsored by DeepComputing, Red Hat, and RISC-V International, was less a product launch than a proving ground. Attendees worked directly with the hardware, tuned the operating system, and pushed the machine hard enougRISC-V CPUh to reveal what works and what still doesn’t. In any ecosystem, a platform becomes real the moment developers start breaking it.

The machine itself is built around the SpacemiT K1, a RISC-V system-on-chip aimed at edge AI and general computing. It isn’t trying to compete with Apple’s M-series or Qualcomm’s new AI PC processors; the ambition is different. This is an open-ISA developer machine, designed to explore what an AI laptop built around RISC-V actually looks like. The architecture combines three compute domains: an eight-core 64-bit  complex running around the 2 GHz class; a 256-bit implementation of the RISC-V Vector Extension (RVV 1.0); and a fixed-function neural processor called the AI Fusion Engine delivering roughly two tera-operations per second.

The scalar cores run the operating system and application logic, the vector engine handles the messy middle ground of AI workloads—quantization, dequantization, normalization, and data reshaping—while the NPU accelerates the dense matrix multiplications that dominate transformer inference. Readers unfamiliar with RVV can find a practical introduction in Dr. Thang Tran’s RISC-V Vector Primer on GitHub (https://github.com/simplex-micro/riscv-vector-primer). Memory comes from LPDDR4X, up to sixteen gigabytes, paired with NVMe storage, all packaged inside a Framework-compatible modular chassis. It is very clearly a developer’s laptop.

The Boston workshop centered on Fedora Linux, and that choice was deliberate. Red Hat has been quietly treating RISC-V as a serious upstream architecture target, and the event exposed how far that effort has progressed. Participants booted Fedora on the ROMA II hardware, examined kernel support, checked package coverage, and explored the gaps that still need attention. For the first time, a mainstream Linux distribution ran interactively on a RISC-V laptop in a public developer workshop. A few years ago that alone would have been notable; what came next mattered even more.

The demonstration shifted quickly from operating systems to AI. Developers loaded compact language models—roughly one to three billion parameters—and ran inference locally. Tokens appeared in real time. Quantization settings changed. Thermal behavior became visible. The point wasn’t to prove that RISC-V could compete with GPU servers; the goal was simpler: show that local AI actually works on the platform. Several patterns emerged almost immediately. The NPU proved essential; CPU-only inference slows dramatically once models move beyond trivial size. The vector engine quietly handled much of the surrounding workload—quantization, KV-cache updates, normalization, reshaping—exactly the kind of glue logic modern AI systems require. The execution model looked familiar: CPU orchestrates, NPU performs the heavy math, vector units handle the data transformations in between.

The real constraint turned out to be memory bandwidth. LPDDR4X limits throughput once models approach roughly three billion parameters, which is one reason DeepComputing positions ROMA II as a developer platform rather than a consumer AI laptop. Even so, the system proved stable under sustained load. Developers ran inference long enough to observe predictable thermal throttling behavior, stable kernel drivers, and no crashes or hangs. For a first-generation RISC-V laptop platform, that level of stability matters more than benchmark numbers.

The machine already demonstrates several things the ecosystem has been waiting for: it runs Fedora natively, executes real LLM workloads locally, and operates within a fully open instruction-set ecosystem. The modular Framework chassis makes it attractive for engineers working on kernels, drivers, and machine-learning software. At the same time, its limits are obvious. Two TOPS of NPU performance supports small models but not larger seven-billion-parameter networks; CPU performance sits in the mid-range compared with modern laptop processors; memory bandwidth constrains scaling; the GPU contributes little to machine-learning workloads for now. ROMA II is not a consumer AI laptop—it is a developer workstation for the RISC-V ecosystem.

Still, the Boston workshop signals something broader. For years, discussions about RISC-V laptops lived mostly in presentations and roadmaps. Here developers were installing Linux, compiling software, and running AI on real hardware. That combination changes the conversation. When engineers can treat a platform like a normal computer—boot it, modify it, push it until it breaks—the architecture stops being a research topic and becomes an engineering target.

DeepComputing’s roadmap already points toward the next step. The upcoming DC-ROMA AI PC moves to an ESWIN dual-die system-on-chip with eight SiFive P550 cores, roughly forty TOPS of NPU performance, and thirty-two to sixty-four gigabytes of LPDDR5 memory, alongside a custom vector processing cluster and compatibility with the Framework Laptop 13 chassis. That level of compute should support four-to-seven-billion-parameter models comfortably. Seen in that light, ROMA II is less an endpoint than a bridge.

What happened in Boston may look small from the outside—a room full of developers installing Linux and running a language model—but these moments are how ecosystems turn. A laptop boots, software runs, developers start experimenting. At that point the architecture stops being hypothetical, and RISC-V personal computing starts to look real.

Also Read:

The Evolution of RISC-V and the Role of Andes Technology in Building a Global Ecosystem

The Launch of RISC-V Now! A New Chapter in Open Computing

Pushing the Packed SIMD Extension Over the Line: An Update on the Progress of Key RISC-V Extension