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Without Technology, China MIC 2025 Results for ICs Likely to Fall Woefully Short

Daniel Nenni

Admin
Staff member
IC Insights believes China’s self-sufficiency targets for ICs of 40% in 2020 and 70% in 2025 are unrealistic.

The newly released 2017 20th anniversary edition of The McClean Report contains an analysis of the three phases of China’s attempt to gain a stronger presence in the IC industry (Figure 1). The analysis of Phase 3 includes a long list of the successes and setbacks that the Chinese have faced since initiating this strategy in 2014.

View attachment 19060
China’s government has a long-term goal to become self-sufficient with regards to IC devices. Its “Made in China 2025” (MIC 2025) plan was published by the China State Council in May of 2015. The milestones in MIC 2025 are for China to be 40% self-sufficient in IC devices in 2020 and 70% in 2025. In reality, it is naive to believe that being 40%, 70%, or whatever percentage less than 100%, is even close to being self-sufficient in the IC industry. In just about every case, the lack of just one low-value IC (e.g., a mixed-signal analog device), process material (e.g., a specific chemical or gas used in fabricating ICs), or package type will stop the entire electronic system from being produced and shipped.



View attachment 19061

As an example, in the early 1980s, the U.S. government attempted to make sure that every wafer processing and packaging material as well as every piece of semiconductor processing equipment that was used to make military ICs have at least one U.S. source. Even more than 30 years ago, when IC processing was much less complex than it is now, this program had to be abandoned due to the impossible task of making sure there was a U.S. source for literally thousands of items. The bottom line is that anything less than 100% self-sufficiency in the IC industry is not self-sufficient.

The success of MIC 2025 is fundamentally dependent upon two things—funding and technology. The goals of MIC 2025 have almost no chance of success without strong results in both of these areas. IC Insights considers each one to have equal weight on the potential final outcome.

There is near-unanimous consensus that funding will not be a hindrance for the potential success of MIC 2025. China’s National Government has approved approximately $20 billion of funding support for its IC industry programs with almost another $100 billion of possible support coming from local Chinese governments, provinces, and private investors. In total, the tens of billions of dollars of funding now targeting the IC industry is probably sufficient to construct at least 10 high-volume 300mm IC production fabrication facilities. It should be noted that regardless of what happens with China-based IC production in the long run, IC equipment companies are in prime position to benefit from this massive spending spree over the next few years.

IC Insights believes that the huge roadblock standing in the way of the success of MIC 2025 is the ability of the Chinese to acquire the IC technology to be used in the newly funded fabs. Beginning in 2014, the Chinese sought to acquire technology by acquiring existing IC suppliers. The Chinese had some early success in acquiring companies like ISSI and OmniVision, but most governments are now on “high alert” with regard to China’s IC industry ambitions and future foreign IC company acquisitions will be very difficult to complete.

Essentially, the window of opportunity for the Chinese to attain IC technology through foreign company acquisitions is now closed.

Although the amount of money reported to be allocated toward constructing the new indigenous Chinese company IC fabs has been massive, the technology announced to be used in these fabs has in every case been at least two generations behind what the market leaders in that segment are currently using or will be using when the fab opens. Some examples are shown below.



  • [*=left]XMC (purchased by Tsinghua Unigroup in July 2016 and put in a holding company called Yangtze River Storage Technology)—32-layer 3D NAND technology.
    [*=left]Fujian Jin Hua Integrated Circuit—32nm DRAM technology.
    [*=left]Shanghai Huali (HLMC)—28nm foundry logic capability.
While all of the currently announced China IC fabs seem to be more than adequately funded, none of them appear to possess the IC technology needed to compete with the leaders in their respective product segments.

There have recently been reports that the Chinese companies building the new fabs discussed above are hiring IC engineers from Samsung, SK Hynix, and Intel’s China-based IC facilities. This method has been mentioned as one way for Chinese companies to “develop their own” IC technology as these engineers bring IC process knowledge/experience acquired at their former employer with them. In IC Insights’ opinion, this is a very dangerous way to “develop” IC process technology.

In 2003, in China-based pure-play foundry SMIC’s second year of production, TSMC filed a lawsuit alleging that SMIC hired more than 100 former TSMC employees and asked them to provide SMIC with TSMC trade secrets. Moreover, TSMC alleged that SMIC infringed on five of TSMC’s IC process technology patents (later expanded to eight patents). In early 2005, SMIC and TSMC settled the lawsuit with SMIC paying TSMC $175 million and TSMC gaining an 8% stake in SMIC. Prior to the settlement, a California jury returned a verdict against SMIC in a U.S. lawsuit filed by TSMC.

With the stakes so high, once the newly opened Chinese-owned memory fabs begin production, expect the reverse engineering teams at Samsung, SK Hynix, Micron, Intel, Toshiba, and Western Digital (SanDisk) to shift into high gear by taking apart the new Chinese DRAM and 3D NAND devices to determine which of their patents are being infringed upon by these new memory players. IC Insights believes that with the decades of high-volume DRAM and NAND flash production history of the major memory suppliers, it will be almost impossible to develop new DRAM and NAND flash technology without infringing on numerous patents within these companies’ extensive portfolios.

In 2016, IC production in China (including foreign companies) represented 11.6% of its $112 billion IC market, up less than two percentage points from 9.8% five years earlier in 2011. Moreover, China-based IC production is forecast to exhibit a very strong 2016-2021 CAGR of 18%. However, considering that China-based IC production was only $13.0 billion in 2016, this growth will start from a relatively small base.

Given the sheer size of the expected expenditures for new Chinese IC facilities, as well as an expanding presence of foreign IC producers (e.g., Intel, Samsung, etc.), IC Insights believes there will be a significant improvement in the share percentage of China-based IC production through 2025 (Figure 2), but nowhere near the levels forecast in the MIC 2025 plan. As shown, IC Insights forecasts that this share will increase to 17.0% in 2020 and to 25.0% in 2025, each less than half of the original MIC 2025 goals.

Report Details: The 20th Anniversary 2017 McClean Report
Additional details on China's IC market and the total worldwide IC market through 2021 are included in the new 20th anniversary 2017 edition of IC Insights’ flagship report, The McClean Report—A Complete Analysis and Forecast of the Integrated Circuit Industry. A subscription to The McClean Report includes free monthly updates from March through November (including a 250+ page Mid-Year Report), and free access to subscriber-only webinars throughout the year.

An individual-user license to the 2017 edition of The McClean Report is priced at $4,090 and includes an Internet access password. A multi-user worldwide corporate license is available for $7,090.

To review additional information about IC Insights’ new and existing market research reports and services please visit our website: IC Insights | Semiconductor Market Research.

More Information Contact
For more information regarding this Research Bulletin, please contact Bill McClean, President at IC Insights. Phone: +1-480-348-1133, email: bill@icinsights.com

PDF Version of This Bulletin

A PDF version of this Research Bulletin can be downloaded from our website at http://www.icinsights.com/news/bulletins/
 
Dan, I agree completely. This does not even take into account that China is shooting at a moving target of not only rapidly advancing technologies, but entirely new technologies like 3dXpoint and the rapidly advancing optical chips. In the age of the "Great Acceleration" not only does everything advance, but at an increasing rate with ever more technologies that disrupt the old ones at an ever increasing rate. We don't even know what new advances we will see in the next eight years.
 
I have serious doubts as well based on my experience with SMIC. They still have not gotten it right. The industry is moving much to fast for Government controlled companies to succeed. My opinion.
 
How is the situation with more mature technologies, like 0.18 um and older? Are they self-sufficient in this case or still not?
 
Let me say that if China puts all that capital to use to develop blue ocean new semiconductor markets, they will succeed. It would a great use of that money, and easier than trying to steal something. Stealing seems easier, but it really isn't in the long run, because the focus is backward-facing. And I think China's rulers have the wisdom to go for the long-run better route, which is blue ocean.

I think the US could do the same thing, but after setbacks like Solyndra, probably won't.

China could probably develop blue-oceans in 3D NAND and FDSOI products. I don't think they can compete directly in foundry or DRAM. If they want to operate fabs in these fields at huge losses indefinitely, to source military or to fulfill a China-first mandate, they can do that of course. But it would be dumb. Most dumb things don't have a long lifespan.
 
benb,

The quote from Scott DeBoer at their recent Analyst Conference is germane here. He's referring to a cost performance graphic for NAND, XPoint, and their "new Memory" vs. STT-RAM but the comment could be directed at any IC tech.

“the substantial challenge […is to] find an intercept point for that technology where it is meaningful when it gets there. If you look at the commercially viable technologies today and project where they are going to be in five years or so you see a couple of trends here. One is for a new technology to be in this bottom quadrant on the performance versus cost-per-it graph both NAND and 3D XPoint have very significant cost reduction paths over the next few years. So this is very much a moving target for any new memory to intercept […] with a cost profile that makes it significant and enables a market at the same time. So the opportunity there for prospective [replacement] technologies […] is very challenging.”

He's echoing Siva Sivaram of WDC who said essentially the same thing in their Analyst Conference. Are these guys whistling past the graveyard here? I don't think so!
 
Mr. Hanson,

Perfectly stated. Scott DeBoer and Siva Sivaram agree with you. See my response to benb below.
 
benb,

The quote from Scott DeBoer at their recent Analyst Conference is germane here. He's referring to a cost performance graphic for NAND, XPoint, and their "new Memory" vs. STT-RAM but the comment could be directed at any IC tech.

“the substantial challenge […is to] find an intercept point for that technology where it is meaningful when it gets there. If you look at the commercially viable technologies today and project where they are going to be in five years or so you see a couple of trends here. One is for a new technology to be in this bottom quadrant on the performance versus cost-per-it graph both NAND and 3D XPoint have very significant cost reduction paths over the next few years. So this is very much a moving target for any new memory to intercept […] with a cost profile that makes it significant and enables a market at the same time. So the opportunity there for prospective [replacement] technologies […] is very challenging.”

He's echoing Siva Sivaram of WDC who said essentially the same thing in their Analyst Conference. Are these guys whistling past the graveyard here? I don't think so!

The 3D NAND cost per die has still been increasing as die size has been increasing with capacity, in particular, number of layers. So some shrink still has been used to boost bit density faster than number of layers. The vertical scaling trend hasn't be so aggressive so far. Going from 64 to 96 layers, to go from 4 to 6 Gb/mm<sup>2</sup>, the die size cannot increase anymore.
 
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Putting charts and curves I haven't seen aside, there are essentially two paths China's ambition can take them: Me-too (stealing), or blue-ocean. I would applaud the later although the former is the most likely.

The reason I'm applauding the less likely scenario is not to disagree with Arthur or Daniel though. This industry used to have grand challenges, called red bricks, so called because they blocked the way for progress on the International Technology Roadmap for Semiconductors (ITRS). As the red bricks have slowly stopped progress, few have stepped forward to propose solutions. I would like to view China as taking up the gauntlet and preparing to engage with these huge challenges, brining their considerable financial and human resources to bear.

The problems the industry faces are huge. We have failed to move to 450nm wafers. We have failed to implement EUV. While technology still scales, cost scaling has stopped or (as I hope) paused at 28nm, there is hope but not certainty that 10 or 7nm will bring costs down compared to 28nm. The costs have to come down. EUV may not even be the solution. If China takes an honest crack at it, maybe they can succeed where the rest of the world has failed.
 
For the example of 3D NAND, the key fabs are Intel's Fab 68 and Samsung's Xian Fab. Interestingly, the companies selected to manufacture such key strategic technology in China, and now it is known that China has the strong interest in the same technology.
 
Fred,

I don't understand what you are saying. For the IM partners at any rate , there really is no correlation between density and die size. Their latest process, the 64L implementation, has two implementations that are directed at two different markets. The 256Gb TLC die, is 59mm2 and that puts it in the sweet spot for mobile use cases. The larger die (they have not announced its dimensions but we can be confident it is larger, is a 512Gb configuration that will be more attractive in server applications. I would be very surprised if there is a much difference at all between the two implementations of 64L in terms of density and thus wafer bit yield.
 
Ideally, the 3D NAND die size would not increase so much from adding layer-assigned circuitry outside the array. The Samsung and Toshiba product die sizes increased roughly in proportion to number of layers, 48L being ~100mm<sup>2</sup> and 64L being ~130.
 
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Fred,

Interesting. The CMOS under the array (CuA) architecture seems to be giving IM a lot of flexibility in their approach.
 
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