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Finally, 40nm comparisons are disingenuous. 40nm was so legendarily bad, it's easy to look back and say: "We're doing 3x better!" That doesn't actually tell us anything. It's like Intel comparing CPU power consumption improvements to 2005 Prescott-based Xeons, which were notoriously worse than anything else.
I'm not advancing any particular viewpoint here; I don't know the extent or nature of any troubles TSMC has had at 28nm. The point is, these situations are more complex than any single article makes them sound.
Very true, comparing 40nm yield and 28nm is apples versus oranges. However, I believe the TSMC quote that is being misrepresented is a "defect density" comparison which is a very common process ramping metric.
I will try and do a more detailed post on yield this weekend. You really do have to differentiate process yield versus design yield. The problem is these so called professional semiconductor journalists and analysts have no clue as to what they are reporting and it really annoys me.
