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Latest Samsung foundry info

This is from a recent interview:

Mike Lercel, director of product marketing at ASML, told SEMI that his company is very confident that EUVL will be ready for next-generation nodes, having demonstrated progress on the NXE:3350B, which is intended for volume production: achieving 1,368 wafers per day at the ASML factory, and excellent imaging and overlay performance at >80W. He further noted that the company’s logic customers will take EUV into production in 2018-2019, so it needs to ship in volume a year before — likewise for DRAM. “We believe that EUV is cost-competitive around 1,500 good wafers per day, but the crossover point may be lower depending on the customer and the application.”

EUVL: Taking it down to 5nm | Solid State Technology

2018-2019 is 5nm for TSMC and 7nm for Samsung and Intel?
 
For those that want to hear the latest on the record by ASML on the EUV HVM introduction at all their major customers at the 7 nm node (ASML calls TSMC's 5 nm sort of a 7 nm node),listen to the investor webcast at Jefferies TMT in Miami, by Craig de Young (VP Investor Relations ASML) from May 10-11.

The last 6 minutes or so of the 25 minute interview is on the EUV HVM introduction, where he states that ASML is now talking with the manufacturing 'guys' of all major clients about how many EUV production tools (NXE3400 I suppose)
they want in 2017 and 2018. Roughly expected to be 10-12 EUV tools in 2017 and about 24 or so in 2018, to enable HVM with EUV at 7 nm. These tools are about 115 M$/each Craig said.

ASML aims to have the availability of their EUV tools to about 90% toward end of year (still Sn droplet source issues mainly) and source power up to 250 watt at the customers fabs. But main focus is at increasing availability (now around 80%). So, it seems the main discussions that ASML presently has are with the production people at the main customers of ASML's EUV tools, and not so much anymore with the development people. Seems to correspond with the story on Samsung's visit early May at ASML, see the story from the Korean Times website.

Listen to the investor webcast by ASML's Craig de Young here:
http://wsw.com/webcast/jeff96/asml/index.aspx

User nl.




No manufacturing can happen without the pellicle solved. NXE:3400 doesn't even appear to be the final tool version - some lens heating is still not fixed until NXE:3450 in 2019.
 
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This is from a recent interview:

Mike Lercel, director of product marketing at ASML, told SEMI that his company is very confident that EUVL will be ready for next-generation nodes, having demonstrated progress on the NXE:3350B, which is intended for volume production: achieving 1,368 wafers per day at the ASML factory, and excellent imaging and overlay performance at >80W. He further noted that the company’s logic customers will take EUV into production in 2018-2019, so it needs to ship in volume a year before — likewise for DRAM. “We believe that EUV is cost-competitive around 1,500 good wafers per day, but the crossover point may be lower depending on the customer and the application.”

EUVL: Taking it down to 5nm | Solid State Technology

2018-2019 is 5nm for TSMC and 7nm for Samsung and Intel?

Immersion does 4000 wafers/day with multipatterning (3-mask SADP/SAQP NAND) Also the EUV dose is 20 mJ/cm2 for this reference, but would go up to over 40-60 mJ/cm2 (to try to quiet the stochastic variation of shot noise), so we can probably expect the EUV run rate to go back to below 1000 w/day.
 
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Hi,

I'm an investor recently started looking into semiconductor industry. Sorry my questions may not be very interesting at this moment. But is there a post somewhere on this forum explaining the history of Samsung's semiconductor business? How did Samsung acquired or developped its technology? What did Samsung Foundry have when founded starting with 130nm in 2005? How did Samsung compare to TSMC back in 2005? What happened to Samsung and TSMC during the past 10 years?

Thanks!
 
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