Intel Employees "Very Optimistic"

[MKWVentures]

@nghanayem
Sorry jumped into this late

Neither Intel TSMC have any production product out to real customers on N2 /18A. correct? Intel will not have a 18A launch in 2025 per Intel, correct?

In my model TSMC will ship more GAA wafers to end customers in 2026 than Intel (including Intel products). is this wrong?

Then we have the Intel financial problems of not being able to ramp without risking balance sheet and the fact that 18A is not cost effective yet.

Why would we think Intel is the leader? It seems to be like calling Samsung the leader since they introduced GAA 1+ years ago. they were the leader except for execution.

Intel might be the leader someday, but don't they have to actually deliver something before we take that as fact?

 

[dkr1986]

Neither Intel TSMC have any production product out to real customers on N2 /18A. correct? Intel will not have a 18A launch in 2025 per Intel, correct?

Intel still expects to launch at least 1 SKU of Panther Lake notebook CPUs (18A product) in late 2025. Lip Bu Tan (CEO), Dave Zinsner (CFO) & Michelle (CEO of Intel Products) have all reaffirmed that Panther Lake notebooks will launch this year (2025). Major volume in 2026 for rest of the Panther Lake family. But this means the chip needs to get into notebook ODMs hand at least a while before.

Also 1H'2026, Clearwater Forrest (Xeon 7E) is supposed to launch but expected to be less volume compared to P core Xeon 7P (Diamond Rapids). Recently Michelle said DMR is also launching 2026. But as you know we have to account for slow ramp of server CPU products. Both of these are expected to be 18A products.

In my model TSMC will ship more GAA wafers to end customers in 2026 than Intel (including Intel products). is this wrong?

May I ask if that GAA wafer volume for TSMC 2nm is first half or second half weighted in 2026? If you can answer please, thanks. So far, except for AMD's Venice (Zen 6) CPUs, we don't know of any other product on N2 (Although I generally don't have visibility on ASICs, maybe those are the ones on 2nm). Even Zen 6 CPUs from AMD is supposed to be combination of N3 and N2. Intel's top end SKU for Nova lake (to launch in 2026) is rumored to be on N2 but again expected to be low volume.

 

[siliconbruh999]

In my model TSMC will ship more GAA wafers to end customers in 2026 than Intel (including Intel products). is this wrong?

You are correct here

Then we have the Intel financial problems of not being able to ramp without risking balance sheet and the fact that 18A is not cost effective yet.

The biggest issue is money for Intel as you said even if they have the ability to do so they don't have enough money/commitments outside of Intel.

Why would we think Intel is the leader? It seems to be like calling Samsung the leader since they introduced GAA 1+ years ago. they were the leader except for execution.

Intel might be the leader someday, but don't they have to actually deliver something before we take that as fact?

If Panther lake launches this year even a single sku and follow up with decent volume in Q1 26 I would say they kind of delivered on their promise ofc N2 will outship 18A wafer as a whole.

 

[Daniel Nenni]

@nghanayem
Sorry jumped into this late

Why would we think Intel is the leader? It seems to be like calling Samsung the leader since they introduced GAA 1+ years ago. they were the leader except for execution.

According to marketing presentations Samsung is the leader at 3nm and 2nm so this conversation is moot. Unless of course we count yield? What is 18A yielding? TSMC N2 is at 80%+ yield last I heard and Samsung 2nm was at 8%.

 

[siliconbruh999]

May I ask if that GAA wafer volume for TSMC 2nm is first half or second half weighted in 2026? If you can answer please, thanks. So far, except for AMD's Venice (Zen 6) CPUs, we don't know of any other product on N2 (Although I generally don't have visibility on ASICs, maybe those are the ones on 2nm). Even Zen 6 CPUs from AMD is supposed to be combination of N3 and N2. Intel's top end SKU for Nova lake (to launch in 2026) is rumored to be on N2 but again expected to be low volume.

I can answer that Nova Lake next gen Mobile SoC from APPLE/QCOM/MTK AMD Venice to name a few.

 

[dkr1986]

I found out where the volume for N2 is coming from, and it is second half weighted as I expected. Only AMD and Bitamin (ASIC) will possibly have N2 products on shelf in 1H'2026. Most of the products on N2 will be out in late 2026 or even 2027. But obviously Intel Foundry with 18A is not going to beat this wafer volume in 2026!

https://www.notebookcheck.net/Intel-AMD-Apple-Nvidia-and-MediaTek-tipped-to-use-TSMC-s-cutting-edge-2-nm-node-Qualcomm-notably-absent.924561.0.html

 

[dkr1986]

What is 18A yielding

Latest news is Panther Lake die on 18A is yielding 50% at the minimum. This is from an UBS analyst note and this number seems to be underestimated by Intel's own disclosure in Foundry Direct Connect 2025.

TSMC N2 is at 80%+ yield

That yield number is on an SRAM chip (equaling to a defect density, D0 of >1.0/sq-cm). Nobody knows what the yield of a real chip on N2 is, yet unless I am missing something here.

 

[siliconbruh999]

 

[sonchoy]

Latest news is Panther Lake die on 18A is yielding 50% at the minimum. This is from an UBS analyst note and this number seems to be underestimated by Intel's own disclosure in Foundry Direct Connect 2025.
View attachment 3258

That yield number is on an SRAM chip (equaling to a defect density, D0 of >1.0/sq-mm). Nobody knows what the yield of a real chip on N2 is, yet unless I am missing something here.

Panther Lake die size is ~114 mm2 (link below).

Intel Panther Lake-H & Panther Lake-U CPU Configurations Revealed: Up To 16 CPU Cores, 12 Xe3 "Celestial" iGPU Cores, Five Tiles In 25W Flavors

Intel's next-gen Panther Lake CPU configurations have been revealed along with the first blueprint revealing up to 5 tiles.

wccftech.com

North of 50% yield for a ~114mm2 die at this stage in production should be quite good, if it is H-SKU they're launching this year. U-SKU die size should be smaller.

Does anyone know what die size N2 yield is being quoted for? The yield Dan quoted (~80%) - I heard from multiple outlets but can't find the corresponding die size.

 

[dkr1986]

North of 50% yield for a ~114mm2 die at this stage in production should be quite good.

Intel said their Best Wafers are already at HVM D0 (which is presumably 0.1/sq-cm) and also said that 18A yields are better compared to all Intel's previous nodes including 22nm (per Ben Sell- VP of TD). Both statements are made at Foundry Direct connect 2025. Panther Lake Yields are better than Meteor Lake at this point of time in production cycle per Intel management.

Does anyone know what die size N2 yield is being quoted for? The yield Dan quoted (~80%) - I heard from multiple outlets but can't find the corresponding die size.

There were many news articles about N2 SRAM chip yield. The most recent one is from the slides of TSMC which says 256Mb SRAM average yield is >90%. If you do the calculation with online calculators considering the N2 SRAM density is 38MB/sq-mm, this will equal an average D0 of 1.5/sq-cm.

 

[kevin01]

I agree about clients, especially Lunar Lake. Regarding servers, for Amazon's Graviton, for example, x86 compatibility is not a factor (Amazon has complete control over the software stacks they use Gravitons for internally), Arm cores are more power efficient, and Arm's IP to make chip development easier is excellent. I've had some trouble figuring out how many employees Annapurna Labs has, but the available evidence says low hundreds. If correct, that's an amazingly efficient organization, even if each ArmV9 core is somewhat lower in performance than a comparable Intel x86 core. I have a lot of respect for what Amazon's team has accomplished in cloud server CPUs. The value proposition for AWS appears to be awesome.

I wonder how much royalty AWS needs to pay ARM for each core?

 

[sonchoy]

Intel said their Best Wafers are already at HVM D0 (which is presumably 0.1/sq-cm) and also said that 18A yields are better compared to all Intel's previous nodes including 22nm (per Ben Sell- VP of TD). Both statements are made at Foundry Direct connect 2025. Panther Lake Yields are better than Meteor Lake at this point of time in production cycle per Intel management.
View attachment 3261

View attachment 3262
There were many news articles about N2 SRAM chip yield. The most recent one is from the slides of TSMC which says 256Mb SRAM average yield is >90%. If you do the calculation with online calculators considering the N2 SRAM density is 38MB/sq-mm, this will equal an average D0 of 1.5/sq-cm.

Thanks. Intel's 18A HVM D0 at 0.1/sq. cm. and TSMC N2 D0 at 1.5/sq. cm. would be a serious difference at this point in time. And then one has to worry about how many defect modes are there.

I found it curious that AMD is the first one to launch a product in N2. Usually Apple is the one to launch the new TSMC nodes. Apple is higher volume, smaller Silicon (Mobile) area vs. AMD's comparatively lower volume, larger Silicon area. Apple's smaller dice for phones should be easier to yield unless AMD's dice are either smaller or are dominated by SRAM cache and repaired to recover yield.

 

[dkr1986]

Thanks. Intel's 18A HVM D0 at 0.1/sq. cm. and TSMC N2 D0 at 1.5/sq. cm. would be a serious difference at this point in time.

Intel's avg 18A wafer D0 is probably higher (may be 0.2+/sq-cm if you consider Pat's 0.4 D0 comment back in Q3'24), it is their Best Wafers that are at HVM D0 now (I assumed that they are talking about 0.1/sq-cm here as HVM level D0). TSMC N2 D0 is unknown at this time. Only information we can infer is from that SRAM yield they have shared which may be not accurate (the calculations).

I found it curious that AMD is the first one to launch a product in N2. Usually Apple is the one to launch the new TSMC nodes. Apple is higher volume, smaller Silicon (Mobile) area vs. AMD's comparatively lower volume, larger Silicon area. Apple's smaller dice for phones should be easier to yield unless AMD's dice are either smaller or are dominated by SRAM cache and repaired to recover yield.

I also just noticed that M5 (Macbook chips) is also marked as "wafer in" at End'25. So that could be first product out on N2 before AMD too (The last two gen of Macs launched in March). We will have to wait to see.

 

[Jim351]

Pat Gelsinger inherited inferior node process tech (10nm) & inferior product road map (Sapphire rapids on DC CPU - Alder lake was good on client side but didn't address the notebook battery life aspects) and managed a business under external pressure from degrading PC business after post COVID boom due to inventory glut & loss of DC CPU business due to hyperscalers extending their server useful life post COVID & emergence of generative AI getting all the hyperscale capex.

Lip Bu Tan on the other hand is inheriting a competitive node process tech (even if 18A is only N3P comp) & competitive product road map (DMR, PTL, NVL) in Intel's core markets. He is also coming in just in time for Windows 10 EOL PC refresh cycle and at the end of that post COVID server useful life extension. All he has to do is drive operational efficiency and get customers to sign on for foundry. (& Add competitive AI products to get some revenue)

"All he has to do is ...... Add competitive AI products to get some revenue." Were it only as easy to do as it is to say.....

 

[Jim351]

we are literally taking about 14A being less than 10% performance over 18A here Dan. Even if they bungled 14A, it would be hard to screw up that bad.

I will point out that the backside power delivery module Intel is planning for 14A is completely different (named Power direct vs Power via) and is therefore more risky than most are considering.

 

[Daniel Nenni]

Intel said their Best Wafers are already at HVM D0 (which is presumably 0.1/sq-cm) and also said that 18A yields are better compared to all Intel's previous nodes including 22nm (per Ben Sell- VP of TD). Both statements are made at Foundry Direct connect 2025. Panther Lake Yields are better than Meteor Lake at this point of time in production cycle per Intel management.
View attachment 3261

View attachment 3262
There were many news articles about N2 SRAM chip yield. The most recent one is from the slides of TSMC which says 256Mb SRAM average yield is >90%. If you do the calculation with online calculators considering the N2 SRAM density is 38MB/sq-mm, this will equal an average D0 of 1.5/sq-cm.

Why did Intel sign a TSMC N2 wafer agreement? This happened before Lip-Bu. Intel could get better pricing from Samsung for sure so why pay a premium at TSMC? Or why not use 18A? What is the latest spin here?

 

[sonchoy]

Why did Intel sign a TSMC N2 wafer agreement? This happened before Lip-Bu. Intel could get better pricing from Samsung for sure so why pay a premium at TSMC? Or why not use 18A? What is the latest spin here?

I think it makes sense to balance the risk of a new foundry by dual-sourcing regardless of how well the technology may be doing. After all, 10nm memories may still be fresh in the minds of Intel Products.

 

[dkr1986]

Why did Intel sign a TSMC N2 wafer agreement? This happened before Lip-Bu. Intel could get better pricing from Samsung for sure so why pay a premium at TSMC? Or why not use 18A? What is the latest spin here?

Vivek Arya asked this question to Michelle on the recent BofA conference and this is how the interaction went,

Vivek Arya - You mentioned Panther Lake is up and running. You're happy with that success. So if that progress is going per your expectations, why go back to TSMC for Nova Lake?

Michelle - Yes. So maybe just to baseline everybody on Panther Lake. So Panther Lake is a product that's going to launch in the second half of this year. And it is all built on Intel 18A. And really -- so Panther Lake is an all-mobile stack. When you get to the next-generation Nova Lake, it is both a mobile stack and a desktop stack. And so one of the things about the desktop market, which is a place that we have lost market Sigma share, it is a very elastic market. The best product at the time of graphics card launch is really how you kind of take advantage of that TAM. And so being able to land on a node that is already ramped is at very high performance plus yield is very important. So you can imagine, I'm looking at how much yield and product can I get in a very short amount of time. And so when you look at that, you might actually pick maybe not the latest dot of a node at TSMC, but you know you can get a lot of wafers and a lot of product in a really short amount of time. And so you'd put that SKU on TSMC. And so when I say I'm pragmatic, I literally look at it by SKU and where it makes the most sense. And so I like personally a portfolio where I use both boundaries because at times, I want to be cost. At times, I want to be about volume and at times, I want to be about performance. And depending on which is most important for the customer and the segment, that's what I pick. And so it isn't anything about Intel doing something wrong. It's more about optimizing the mix to be able to deliver best on behalf of my customers and hit a particular market window with a particular amount of volume.

One can take away that Michelle is saying N2 is higher performance or higher yielding node at that point of time compared to 18A-P (rumored to be the node for NVL-S, it could be just vanilla 18A too, not sure yet) or Intel is balancing between Internal and external wafer volume with constrained fab capacity. It is up to interpretation.

 

[dkr1986]

"All he has to do is ...... Add competitive AI products to get some revenue." Were it only as easy to do as it is to say.....

No one said it is easy. And I also put it last in a parenthesis because I don't think they will succeed as things stand now. Maybe if we are only in the early innings of AI as people say, Intel can probably get some revenue after their Xe architecture matures more (like a third player) or more on the edge\enterprise AI. I think AMD was able to pivot quicker because they have more experience with GPUs, Intel has only begun (serious focus) recently with Xe. Intel Products team should focus on fixing core market of CPUs (& improve on GPUs) in the short to medium term & Foundry is the long term future for Intel imho.

 

[Daniel Nenni]

I think it makes sense to balance the risk of a new foundry by dual-sourcing regardless of how well the technology may be doing. After all, 10nm memories may still be fresh in the minds of Intel Products.

To be fair 10nm was not a good node for the foundries either. Samsung 10nm did not yield so they had to resort to selling good die versus wafers to Qualcomm. TSMC 10nm was not a popular node either, most companies skipped it other than Apple.