Intel 14A risk production in 2028, HVM in 2029: Lip-Bu Tan at CISCO AI Summit 3 Feb 2026

[user nl]

Nice to see LBT speak about IF at CISCO AI summit yesterday, he starts around 48 minutes:

It seems no more uncertainty about 14A, it will ramp.......

 

[siliconbruh999]

So they said Risk Production was 2027 in the IFS Connect 2025 now it's 2028 are they moving timelines?

[News] Intel Ramps Up Foundry Race: 14A Risk Production in 2027; 18A Variants Drop in 2026 and 2028

Shortly after TSMC announced plans to mass-produce A14 in 2028, Intel appears ready to compete with an aggressive roadmap for 14A and 18A. According t...

www.trendforce.com

 

[user nl]

So they said Risk Production was 2027 in the IFS Connect 2025 now it's 2028 are they moving timelines?

[News] Intel Ramps Up Foundry Race: 14A Risk Production in 2027; 18A Variants Drop in 2026 and 2028

Shortly after TSMC announced plans to mass-produce A14 in 2028, Intel appears ready to compete with an aggressive roadmap for 14A and 18A. According t...

www.trendforce.com

That's what LBT says at 51:40

LBT clearly has two major concerns regarding 14A, the variability of the yield and the IP availability. It seems they simply need more time to get that in a better shape. He only wants 5 or 10% of a major product of early customers for 14A to commit to that so that he can get the trust of those companies.

So perhaps Apple, NVIDIA, Microsoft will commit to some small wafer orders to be manufactured in 2029........He will not give the names of the intended customers that he hopes will sign purchase agreements in H2-2026.

I think this may be quite smart (humble) timing of INTEL, these customers have their main orders with TSMC being made in 2028, they trust that that will come. And then INTEL will deliver some small overflow capacity in 2029 of say 5-10%. In that way these customers do not risk major parts of their production if INTEL fails. Makes sense for both sides.

Will be interesting to see if TSMC now goes full in on A14, scheduled for HVM in 2028? They have started building the new fab for A14:
https://en.eeworld.com.cn/news/manufacture/eic712929.html#:~:text=Furthermore, TSMC notified its customers,platform officially put into operation.

 

[siliconbruh999]

I think this may be quite smart (humble) timing of INTEL, these customers have their main orders with TSMC being made in 2028, they trust that that will come. And then INTEL will deliver some small overflow capacity in 2029 of say 5-10%. In that way these customers do not risk major parts of their production if INTEL fails. Makes sense for both sides.

problem is small volume won't justify 14A it needs big volume also i think that 28 risk production is for external and 27 for Internal

 

[IanD]

That's what LBT says at 51:40

LBT clearly has two major concerns regarding 14A, the variability of the yield and the IP availability. It seems they simply need more time to get that in a better shape. He only wants 5 or 10% of a major product of early customers for 14A to commit to that so that he can get the trust of those companies.

So perhaps Apple, NVIDIA, Microsoft will commit to some small wafer orders to be manufactured in 2029........He will not give the names of the intended customers that he hopes will sign purchase agreements in H2-2026.

I think this may be quite smart (humble) timing of INTEL, these customers have their main orders with TSMC being made in 2028, they trust that that will come. And then INTEL will deliver some small overflow capacity in 2029 of say 5-10%. In that way these customers do not risk major parts of their production if INTEL fails. Make sense for boith sides.

Will be interesting to see if TSMC now goes full in on A14, scheduled for HVM in 2028? They have started building the new fab for A14:
https://en.eeworld.com.cn/news/manufacture/eic712929.html#:~:text=Furthermore, TSMC notified its customers,platform officially put into operation.

View attachment 4141

I hate the way they always pick a comparison that makes something look artificially good -- why isn't the comparison A14 vs. N2P, which is the real alternative?

(which claims 5% more speed and 10% lower power than N2, meaning A14 would presumably give 5~10% more speed and 10~20% lower power, rather less attractive...)

 

[IanD]

In spite of the labels, for real applications isn't Intel 14A (with BSPD) really competing against TSMC A16 (N2P+SPR, maybe a year earlier) or A14+SPR (maybe a year later), not A14 (FSPD, about same time) ?

IMHO nobody is going to look at porting/switching between BSPD and FSPD, they're just too different from so many points of view (tools, IP/libraries, packaging, cooling, cost...) -- they'll choose whichever best suits their application, then a vendor. Which for FSPD means TSMC (N2 or A14), while for BSPD they also have the Intel option...

 

[MKWVentures]

The "start risk production" is for PR. Intel revenue doesnt show up until about 1 year after they claim risk production:

No 14A products out in 2027. Most likely no significantly volume out in 2028. Reminder, 18A does not have significant volume in 2026

Intel does not currently plan any significant external wafer volume in total through 2027.

I would be interested to see if PDK on 14A has or does change much. The plan is to make it less capex intensive. the spreadsheet for IFS keeps getting worse.

 

[lefty]

I've seen an interesting tweet here, that says that Intel's 16A / 14A are useless for mobile applications, because of the compulsory BPD

The reason TSMC emphasized that A16 is HPC-exclusive is that implementing BPD requires a specific process step that must be performed during the wafer flip, and that step significantly degrades the heat dissipation (thermal spreading) performance of backside power delivery. As a result, chips fabricated on the A16 node inevitably become HPC chips that mandatorily require liquid cooling.

https://twitter.com/x/status/2017809609474601145

 

[IanD]

I've seen an interesting tweet here, that says that Intel's 16A / 14A are useless for mobile applications, because of the compulsory BPD

https://twitter.com/x/status/2017809609474601145

If it didn't come directly from TSMC***, that could have be lifted what from what I posted here earlier today -- after being simplified by about 100x... ;-)

I

Post in thread 'Intel’s 18A rumors meet a thermal brick wall says SemiWiki'

Today at 4:48 AM

No, this is not true.

That rubbish just say when transistor get smaller, there is more heat, just like when you place LED array closer and closer, it will heat up the strip.

1) All transistor FSPD or BSPD going to suffer from this (density vs heat), why only BSPD.
2) Last time I am in high school, Copper (which the signal and power line is make of) is one of the best thermo property out there way better than Silicone, the heat is going to out faster not slower.
3) Last time I am in high school, I learn about the cross cut section thickness the larger the cross cut the lesser the...

• IanD

• 

*** it didn't -- it came from an earlier post I made in Semiwiki on the same subject. It's all getting a bit circular... ;-)

 

[IanD]

If it didn't come directly from TSMC***, that could have be lifted what from what I posted here earlier today -- after being simplified by about 100x... ;-)

I

Post in thread 'Intel’s 18A rumors meet a thermal brick wall says SemiWiki'

Today at 4:48 AM

No, this is not true.

That rubbish just say when transistor get smaller, there is more heat, just like when you place LED array closer and closer, it will heat up the strip.

1) All transistor FSPD or BSPD going to suffer from this (density vs heat), why only BSPD.
2) Last time I am in high school, Copper (which the signal and power line is make of) is one of the best thermo property out there way better than Silicone, the heat is going to out faster not slower.
3) Last time I am in high school, I learn about the cross cut section thickness the larger the cross cut the lesser the...

• IanD

• 

*** it didn't -- it came from an earlier post I made in Semiwiki on the same subject. It's all getting a bit circular... ;-)

And the post greatly exaggerates what I wrote, it makes out that BSPD (especially Intel) is pretty much unusable except for HPC -- the reality is that it's *recommended for/targeted at* HPC because there the advantages are larger and the negative points (thermal, cost) can be dealt with, so FSPD is the best choice for most other applications especially lower-power ones or ones which are harder to cool or more cost-sensitive.

That doesn't mean you *can't* use BSPD (from Intel or TSMC), but as a customer why would you when the advantages are relatively small and the disadvantages relatively large? It would mean that your products are likely to be uncompetitive with those from others who use TSMC FSPD... :-(

Unless you desperately *want/need* to use Intel*** not TSMC, and they only have BSPD... ;-)

*** for reasons like local supply or national security or keeping Intel/USA semis alive...