Intel is commonly believed to have had more scale on 10nm than TSMC had on N5 back in 2021. Even the most conservative tecinsights estimates had the Intel 10nm factory network at well over a million wafers per year at peak ramp. There is no indication that scale was ever a problem at that time. If 1M WSPY was insufficient to amortize the cost of technology TSMC would not have even gotten to 28nm. Also i10nm is probably the most cost ineffective process in semiconductor history. Only a fool would blindly extrapolate 10nm being cost ineffective to mean that all other Intel processes till the end of time would be as bad or worse.
Outsourcing started from insufficient capacity and then continued due to a lack of faith in Intel's own ability to advance Moore's Law. Talk of outsourcing CPUs only happened after 7nm was delayed. Unless you think BS was lying and he already committed to N3 and beyond for CPUs with red ink before he even said that he was beginning to investigate that option. There is also the little detail that LTD wasn't shutdown as well as D1X3 and Fab34/44 construction continuing during BS's tenure which he would have stopped if his intent was to take Intel fabless. Intel themselves said they had no clue exactly how Intel's cost compared to equivalent foundry processes and that the new accounting structure was being implemented specifically so they could understand areas they were deficient. Untangling the numbers took if memory serves over a year from Intel saying they would do it.
To say there was some strong vision for a fabless Intel and that outsourcing was done because Intel didn't believe that they could afford fab investments doesn't agree with the facts known at the time or the actions of key stakeholders. BS was doing something far dumber than going fabless or doubling down on manufacturing. He was doing neither and aimlessly drifting towards a 100% garuenteed to fail and kill the whole company fab-lite strategy. Imagine Intel with the currently floundering Intel products. But now 18A is like 2 years out still, Pantherlake is an N3 product, Intel 4 would have probably been lower yield/more expensive (ala icelake or broadwell) and also weaker, GNR/SRF would have been weaker and like 6-12mo later, there would be no external revenue ever, and all future parts are large low margin tiles designs that are TSMC only, and old reliable (Intel 7) is still being used as a crutch for mainstream parts in 2027. That is the future BS seemed to be charting for Intel.
Find me one point where this or anything even remotely close to this has been said. I'll wait.
One, based on how you have described your career in the past that is a disingenuous way to describe what you did. Two your experience is a decade plus out of date. Three your experience is with memory which is a different world from logic and wasn't Intel's main field of expertise at the time. Four Intel entered into a JV with Micron specifically because they would have thought they needed the help. Five memory TD was never done by PTD or LTD, but by a completely separate CA/NM (depending on which period you want to look at) team.
No they don't. Post financial crisis to D1X mod 3 finishing in 2022, Intel built a "grand" total of 2 development fabs and 1 HVM fab. And that is with process complexity growing approximately 2X over the same period (assuming a 15% jump for each node and two 15% jumps at 14 and 10). During the same period TSMC built 5 development fabs and many dozens of HVM fabs. Everybody knows anything knows Intel logic process technology development was operating on a fraction of TSMC'S TD budget. Frankly I often wonder how Intel didn't get passed sooner by literally everyone else especially with the subpar equipment they were using and the cultural issues that supposedly got even worse after Bill Holt left.
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