ASML reports Q4 results as guided; EUV just `walking` along

[user nl]

This morning ASML reported Q4-15 results and gave guidance for Q1-16.

Because ASML ships (only) some 30-40 litho tools per quarter, of which the high end iArF and EUV tools have production/shipping/installation times of 6-12 months or so, they always have a very solid view on next quarter (and the following quarter, so 6 months ahead, I think) earnings.

Q4-15 sales came slightly above guidance (+2.5%) with 46% gross margin. The whole Y-15 was a record year of sales (6.3 B Euro) with net income after taxes of 22%.

Because of their strong cash flow/balance sheet they decided to increase dividend by 50% and to add another 1 B Euro to their share buy-back program, they still had 500 M Euro left of the Y-15/Y-16 buy-back program. Dividend yield is now around 1.4%, still below the average of S&P500, but ASML wants to keep dividend growing the coming years. They want cash assets of (only) about 2.5 B Euro, and end of Y-15 they had 3.4 B Euro, so they have to unload cash to their shareholders.

As for guidance, Q1-16 will be somewhat lower (sales of 1.3 B Euro) as logic is starting the 10 nm ramp only in Q2-16. Their (non-quantified) guidance for Q2-16 is `significantly higher than Q1-16`, so it seems their 7-8 main customers are not putting on the litho-brakes (yet).

China as a region seems to be putting real money (as they announced) in SEMI: China has now 16% of total ASML backlog of orders as of Q4-15 (total backlog ~ 3.1 B Euro). For the backlog of Q3-15 China represented orders of only 3% of total. China seems to be really ordering lithography tools for their SEMI industry (or other companies with fabs in China).

Not much news on the EUV-front, targets for 2016 are 1500 wafers/day (they said they already did 1250 at ASML site), and 80% availability. They expect to ship some 6-7 EUV tools in Y-16. It seems the EUV litho technology is hammering out the remaining issues the coming year(s) and will be ready for real HVM-production in the coming years. I think we'll hear the coming months/years less and less the more prove that the EUV-technology is marching on, and customers like INTEL and TSMC are keeping a bit more quiet on their EUV progress. It seems the TSMC people are getting more enthusiastic about their EUV 5 nm node HVM-plans:

http://www.eetasia.com/ART_8800718997_480200_NT_a88a243a.HTM
Beyond 7nm
The company plans to start production of 5nm chips sometime in 2019, about two years after it launches the 7nm node, according to Liu. After a series of setbacks at 10nm and 7nm, TSMC now appears ready to use extreme ultraviolet (EUV) lithography to make 5nm chips.
"We've made significant progress with EUV to prepare for its insertion, likely in 5nm," according to Liu. "We are installing third-generation EUV tools. Our goal is to double the data-processing throughput for application processors, graphic processors, programmable gate arrays and other processors."
The company said it has achieved output of 500 wafers per day during a one-month period using EUV.

As said, ASML seems to be doing o.k. at least for the next 6 months or so. They still believe they will get to their sales target of 10 B Euro / year in 2020, with a tripling (relative to Y-14) of net income to around 3 B Euro / year. They expect some 3-3.5 B of those sales will be from services/upgrades, the rest from new litho tools in 2020.

All info and webcast can be downloaded from here:
https://www.asml.com/asml/show.do?lang=EN&ctx=45057&rid=52758

user nl

 

[Daniel Nenni]

ASML gave an update last week at ISS:

View attachment 16360

 

[Daniel Nenni]

And here is the latest from TSMC on EUV:

View attachment 16362

 

[Fred Chen]

Not much news on the EUV-front, targets for 2016 are 1500 wafers/day (they said they already did 1250 at ASML site), and 80% availability. They expect to ship some 6-7 EUV tools in Y-16. It seems the EUV litho technology is hammering out the remaining issues the coming year(s) and will be ready for real HVM-production in the coming years. I think we'll hear the coming months/years less and less the more prove that the EUV-technology is marching on, and customers like INTEL and TSMC are keeping a bit more quiet on their EUV progress. It seems the TSMC people are getting more enthusiastic about their EUV 5 nm node HVM-plans:

http://www.eetasia.com/ART_8800718997_480200_NT_a88a243a.HTM
Beyond 7nm
The company plans to start production of 5nm chips sometime in 2019, about two years after it launches the 7nm node, according to Liu. After a series of setbacks at 10nm and 7nm, TSMC now appears ready to use extreme ultraviolet (EUV) lithography to make 5nm chips.
"We've made significant progress with EUV to prepare for its insertion, likely in 5nm," according to Liu. "We are installing third-generation EUV tools. Our goal is to double the data-processing throughput for application processors, graphic processors, programmable gate arrays and other processors."
The company said it has achieved output of 500 wafers per day during a one-month period using EUV.

All info and webcast can be downloaded from here:
https://www.asml.com/asml/show.do?lang=EN&ctx=45057&rid=52758

user nl

I saw some of the same at their website. Regarding the NXE:3350B shipments in 2015, two made it out and third was in progress. But I think they were more likely heading to Intel than TSMC, since these are fourth-generation tools, while TSMC explicitly stated third-generation (NXE:3300B). Plus those 15 shipments have to start some time, albeit slowly.

 

[user nl]

I saw some of the same at their website. Regarding the NXE:3350B shipments in 2015, two made it out and third was in progress. But I think they were more likely heading to Intel than TSMC, since these are fourth-generation tools, while TSMC explicitly stated third-generation (NXE:3300B). Plus those 15 shipments have to start some time, albeit slowly.

Fred, perhaps, not sure though. TSMC was the first to order the NXE:3350 in the fall of 2014, not sure if they let INTEL take all their '3350 slots', maybe Daniel can update us on the TSMC side of having received the 3350 yet? He usually has good visibility of TSMC activities.

Perhaps TSMC still calls the 3350 a third generation EUV, because they may not count the Alpha Demo tool (perhaps they never had one), see attached link with a presentation from 2006 by ASML on their
demo tool: http://www.sematech.org/meetings/archives/litho/7810/pres/06_zimmerman_asml.pdf
Perhaps somewhat embarrassing for ASML to go through these slides and knowing now what happened in those 10 years since!

Anyway, third or fourth, ASML is talking more and more about the next EUV generation, the NXE-3400. It would be interesting to learn about the specs for that tool. Perhaps, those will be the `real HVM tools`, having similar specs as the potential of the 3350, but probably a higher price?!

Interestingly, in Q4-15 ASML shipped only 11 iArF tools, for a value of 72% * 881 M Euro = 58 M Euro / piece. If those are mostly the latest NXT-1980 with all bells-and-whistles options (for the 10 nm nodes of INTEL and TSMC), I must say the ArF immersion tools are now almost as expensive as the previous EUV-NXE3300 tool that was around 60 M Euro. I guess customers like TSMC and INTEL are getting used to paying hefty prices for immersion ArF also, ever since they started paying hefty for EUV tools. It seems ASML is doing well as a market monopolist and still keeping all their customers happy.....

user nl

 

[Fred Chen]

ASML Holding's (ASML) CEO Peter Wennink on Q4 2015 Results - Earnings Call Transcript | Seeking Alpha

Interesting Seeking Alpha Transcript highlights from P. Wennink:

- 10 nm is lower cost than 14/16 (even though it is multipatterning)
- NXE3350 has in-situ cleaning (hydrogen)
- NXE3350 installation will take some months to completely install
- target is 80% availability and 1500 wafers/day
- suddenly no mention of source power improvement, they are assuming higher throughput from a higher transmission from the cleaning (though hydrogen is known to roughen silicon)

 

[Daniel Nenni]

Here is Robert Maire's view on the ASML Investor call:

ASML reported Q4 2015 results of EUR1.43B and EUR 0.68EPS versus street expectations of EUR 1.59B and EUR 0.71EPS a miss of EUR 160M and 0.03. The bigger issue is an air pocket in Q1 with revenue expectations of EUR1.3B on low gross margins due to utilization but guiding to a strong Q2 uptick. A second half loaded 2016- DRAM down- NAND flat - logic up starting Q2

It seems to be much in line with expectations as its already clear that DRAM is down and NAND is OK but looking for a future ramp of 3D. Logic is expected to pick up as the 3 leaders, Intel, Samsung and TSMC all will likely ramp 10nm in a similar time period.

Orders were good- strong uptick
Orders at EUR1.2B was up 30% sequentially leading to a backlog of EUR3.2B. This clearly supports a strong Q2 given the standard lead time on building tools being in the range of two quarters.

Gross Margins a concern
Everyone is concerned about gross margins in the low forties but the company brushed off concerns as gross margins being primarily related to low factory utilization. Mix may also be a bit of an issue.

Service and Holistic litho remain strong
At EUR 500M , service remains strong and helps support the company through gyrations in tool sales.

EUV remains elusive and progress slow- and perhaps slowing as increases are harder to wring out of systems after low hanging fruit is picked off
The company continues to focus on availability and up time. With up time claims of 70% at customers with a best at 80% but with averages lower. We have heard that real data is a bit over 50% availability without "cherry picking " data.


Wafers per day still very low
ASML claimed 1000 wafers per day at a customer and 1250 wafers per day at the factory but again this is obviously "cherry picked" data and not indicative of all systems and all customers.

We would point out that ASML and IBM jointly claimed a rate of 637 wafers per day "exposed" at IBM back in July of 2014. Given that milestone we have increased 50% in a year and a half.

Not ready for production
ASML also pointed out that a customer "exposed" 15,000 wafers over a four week period, claiming that as a high point of availability and throughput. However if you do the math that comes out to 535 wafers per day which is likely far short of customer expectations to put the systems into production.

EUV revenue recognition likely shows customer concerns
The company said that 1 EUV system out of three shipped in 2015 was recognized as revenue which implies that customers likely have set high availability/productivity goals in order to get acceptance. The company expects to ship 6-7 EUV systems in 2016 but has an expectation of EUR110M in revenue recognition, which sounds like only one tool.

The bottom line is that ASML is shipping EUV tools betting on the come that they can make specs that customers have set that the tools can't currently meet. This revenue backlog could grow to significant levels depending on the pace of EUV progress.

Intel comments still haunting.....
With Intels CEO saying they weren't sure wether EUV would be ready for 7nm the question of insertion point of EUV is raised. However we did not hear a lot of promises from management of ASML on the call as to when EUV would be in production. They are likely gun shy after many, many delays and are making the wise move of backing off making claims that fail to occur instead choosing to vaguely put it out there sometime in the future.

It seems clear that most 10nm will be without currently unreliable EUV and 7nm will become the next potential for insertion and what sounded like a firm commit has faded into a weak, maybe........dare anyone say 5nm???? We will likely hear more at SPIE next month but we are not holding our breath.

Running out of runway
EUV feels like a new airliner that was designed to get off the ground in 1000 feet on a 10,000 foot runway. The new airliner was supposed to be faster, better and cheaper. We are passing 8000 feet and can clearly see the XXXs marking the end of the runway and the trees beyond. We are long past the point of no return and we are still not up to "rotation" speed and worrying about getting off the ground let alone the trees past the end of the run way. The end of the runway is the end of Moore's law somewhere below 5nm (who knows) but we are hurtling towards it at a good clip. The crew is certainly trying valiantly and improvements are coming but we need to see some daylight under the wheels soon.......

Maybe the industry can add some runway before the plane gets there in order to save it....

ASML the stock
ASML's stock has been beaten down from a high of roughly $110 to where we stand today at roughly $80ish. The company is asking investors to overlook a weak Q1 and focus on the promised land of a great Q2 which most will likely be able to do, however it doesn't make us want to run out and buy the stock today, in a hurry.

The stock is likely appropriately priced today and we would likely want to build a position if it fell below $80 or was at a low $80ish valuation for too long. European investors who have fewer choices will likely support the stock despite the issues so we think it may hover in this range. We think there isn't a lot of downside in the stock and those investors with a longer view may want to come in.....

The delays of EUV continue to bode well for the likes of LRCX and AMAT and others who do dep and etch as we would guess they will see a lot of 10nm business for multiple patterning.

 

[Fred Chen]

The issue of EUV tool (i.e., source) availability comes from the fact that tin debris is deposited onto the EUV collector mirror surface. It reduces the reflectivity, resulting in downtime to restore the reflectivity. ASML (Cymer) now uses hydrogen gas to etch this debris off. But it is still not perfect as reflectivity is not fully restored: http://www.euvlitho.com/2014/P42.pdf