You are currently viewing SemiWiki as a guest which gives you limited access to the site. To view blog comments and experience other SemiWiki features you must be a registered member. Registration is fast, simple, and absolutely free so please, join our community today!
TSMC discussed this on a conference call saying there will be two versions of third generation FinFETs, one using 7 track libraries (16FFC) and one using 9 track libraries (I think it is 16FFT). The one TSMC is talking about openly is FFC, the other is the one used by Apple. And by the way, Apple did not use 16FF+, they used a custom version of that process as well. Apple gets what Apple wants and Apple wants performance over power savings.
I think you've got the wrong end of the stick, you're confusing process with libraries. Both 16FF+ and 16FFC have 9T and 7.5T (not 7T -- doesn't fit with fin pitch) libraries, 9T is higher speed/power/area and 7.5T is lower speed/power/area -- with 7.5T in 16FF+ there's also an option to reduce standard cell area at a slight cost increase. There are also different threshold voltage (ULVT/ILVT/LVT/SVT/HVT) and gate length (16/18/20/24nm) libraries available in both cases to give more tradeoff points -- these are not the same for 16FF+ and 16FFC because the transistor threshold voltages and drive currents are different.
Given their volume it's quite possible that Apple have a tweaked process which isn't either 16FF+ or 16FFC (shrink or non-shrink), but nothing you've said so far backs that up.
I think you've got the wrong end of the stick, you're confusing process with libraries. Both 16FF+ and 16FFC have 9T and 7.5T (not 7T -- doesn't fit with fin pitch) libraries, 9T is higher speed/power/area and 7.5T is lower speed/power/area -- with 7.5T in 16FF+ there's also an option to reduce standard cell area at a slight cost increase. There are also different threshold voltage (ULVT/ILVT/LVT/SVT/HVT) and gate length (16/18/20/24nm) libraries available in both cases to give more tradeoff points -- these are not the same for 16FF+ and 16FFC because the transistor threshold voltages and drive currents are different.
Given their volume it's quite possible that Apple have a tweaked process which isn't either 16FF+ or 16FFC (shrink or non-shrink), but nothing you've said so far backs that up.
TSMC talked about a shrink and non-shrink version of 16FFC on the Q3 2015 conference call. It was a response to a question so it was not scripted. TSMC also said they use the same design rules as 16FF+ so what kind of shrink is it? TSMC is touting 16FFC as a lower cost and lower power version of 16FF+ so to me that is the shrink version. What is the non shrink version for if it is the same as 16FF+?
TSMC talked about a shrink and non-shrink version of 16FFC on the Q3 2015 conference call. It was a response to a question so it was not scripted. TSMC also said they use the same design rules as 16FF+ so what kind of shrink is it? TSMC is touting 16FFC as a lower cost and lower power version of 16FF+ so to me that is the shrink version. What is the non shrink version for if it is the same as 16FF+?
The shrink is an optical shrink of a few percent. Design rules and cell layouts are the same for all three processes (16FF+, 16FFC non-shrink, 16FFC shrink), 16FFC has fewer masks to reduce cost but with some speed decrease or power increase compared to 16FF+, also transistor Vth are higher to reduce leakage at the cost of some speed loss for applications like IoT. The shrink version of 16FFC gets more die per wafer (so lower cost per chip) but with some further performance decrease.
The 16FFC libraries may also be characterised down to lower supply voltages than 16FF+ (e.g. 0.55V minimum instead of 0.7V minimum) because the process is targeted at low-power applications like IoT; lower Vdd saves power at the cost of a slowdown. The other big target for 16FFC is to get the cost down to try and pull business across from 28nm, compared to which it is both faster and lower power.
To summarise; 16FF+ is targeted at higher-speed higher-voltage speed-critical applications, 16FFC is targeted at lower-speed lower-voltage lower-cost power-critical applications -- neither process is "better" than the other.
