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  1. F

    Beyond Ex-VP Lo, Intel Is Reportedly Poaching TSMC Arizona Engineers With 20–30% Higher Salaries

    Has Intel already met its workforce reduction target for this year?
  2. F

    Beyond Ex-VP Lo, Intel Is Reportedly Poaching TSMC Arizona Engineers With 20–30% Higher Salaries

    Such a big workload difference, if true, could correlate to the amount of business the respective companies are handling. Or else, one company is simply slacking 😏.
  3. F

    TSMC formally sues ex-SVP over alleged transfer of secrets to Intel

    How could this happen without raising suspicions? So actually, the mention of the boxes kind of surprised me. If true, some staff at TSMC would also be in trouble for it. I am surprised that the boxes were not or would not be inspected. The procedures must be changed now for sure. But if there...
  4. F

    TSMC formally sues ex-SVP over alleged transfer of secrets to Intel

    That's the thing, would have thought they're still in TW.
  5. F

    TSMC formally sues ex-SVP over alleged transfer of secrets to Intel

    Easiest solution: get all the boxes back.
  6. F

    Beyond Ex-VP Lo, Intel Is Reportedly Poaching TSMC Arizona Engineers With 20–30% Higher Salaries

    "Compared with TSMC, Intel is reportedly offering salaries that are 20–30% higher while providing a workload that is roughly half as heavy, successfully attracting some U.S. engineers to switch over." The mention of workload difference caught my eye. If it's true, it says more about the...
  7. F

    Beyond Ex-VP Lo, Intel Is Reportedly Poaching TSMC Arizona Engineers With 20–30% Higher Salaries

    Former TSMC senior vice president Wei-Jen Lo’s move to Intel—along with allegations that he took sub-2nm documents—has now sparked reports that Intel is also trying to recruit TSMC engineers in Arizona. According to Liberty Times, sources say Intel has recently been aggressively poaching...
  8. F

    Kirin 9030: SMIC's first 5 nm class smartphone SoC debuts on Geekbench alongside Huawei Mate 80 Pro Max

    The transistor density uses the standard cell height. For a 6-track cell, it means the cell height is 6 track metal pitches, although the rails occur after every four tracks. The rails would be 3 times the signal track metal width. If the gate pitch is 54 nm, at 125 MTr/mm2, the cell height...
  9. F

    Kirin 9030: SMIC's first 5 nm class smartphone SoC debuts on Geekbench alongside Huawei Mate 80 Pro Max

    This is the X post I referred to: 定焦数码 mentioned it's between TSMC N6 and Samsung 5LPE. 5LPE pitches are given here: https://fuse.wikichip.org/news/2823/samsung-5-nm-and-4-nm-update/. 54 nm gate pitch and 36 nm M2 track pitch, giving 126 MTr/mm2.
  10. F

    Kirin 9030: SMIC's first 5 nm class smartphone SoC debuts on Geekbench alongside Huawei Mate 80 Pro Max

    The 125 MTr/mm2 came from a Weibo post on March 24 this year by 定焦数码, later reposted on X the same day by @Jukanlosreve. If the SMIC N+3 125 MTr/mm2 density is real, then we can project some pitches, using calibration from https://www.angstronomics.com/p/the-truth-of-tsmc-5nm. If the gate...
  11. F

    Kirin 9030: SMIC's first 5 nm class smartphone SoC debuts on Geekbench alongside Huawei Mate 80 Pro Max

    Huawei's upcoming Mate 80 Pro Max has shown up on Geekbench with a new Kirin 9030 SoC. It is the first smartphone chip to be manufactured on the SMIC N+3 node. Anil Ganti, Published 11/25/2025 🇪🇸 🇵🇹 SMIC had achieved a significant breakthrough in its semiconductor manufacturing prowess. It has...
  12. F

    ASML opens new EUV machine training center in the US, will train 1000+ engineers per year

    No, it is targeted at ASML staff, although customers can pay for their own staff training. High-NA only covered in the Netherlands. https://www.reuters.com/world/asia-pacific/asml-launches-technical-academy-phoenix-train-in-demand-engineers-2025-11-20/
  13. F

    TSMC formally sues ex-SVP over alleged transfer of secrets to Intel

    It's not an action against Intel (yet). It's against Lo, may go after his assets.
  14. F

    Xiangdi 5nm GPU completes tape-out verification

    N+3 is still a guess though. There could still be a rude shock.
  15. F

    Xiangdi 5nm GPU completes tape-out verification

    In publications (CSTIC, CN patents) they often do use 28 nm pitch or 30 nm pitch as examples. But whether that actually pans out, we'll have to see. TSMC N5 is in fact 28 nm MMP (35 nm track M2P).
  16. F

    Xiangdi 5nm GPU completes tape-out verification

    I remember the X90 teardown now. I hadn't known it had been promoted by the state as 5nm the month before. The teardown must have truly caused some embarrassment, TechInsights now blacklisted in China. But what's more significant is whether Huawei itself had considered X90 any generation beyond...
  17. F

    Wei-Jen Lo Suspected of Taking Trade Secrets to Intel

    He's already 75, maybe already disengaged for some time.
  18. F

    ASML opens new EUV machine training center in the US, will train 1000+ engineers per year

    He didn't read the Reuters' report. No High-NA training in the US.
  19. F

    Xiangdi 5nm GPU completes tape-out verification

    Xiangdixian is the key player here; it almost dissolved last year, but apparently got bailed out by Anfu (a battery developer?), probably with government arrangement. At its website, Xiangdixian maintains it is doing domestic GPU production; it previously used 12nm, which likely came from TSMC...
  20. F

    Xiangdi 5nm GPU completes tape-out verification

    This development, which happened a little over two months ago, may not signify much in the GPU world (compared to Huawei and NVIDIA obviously), but a 5nm GPU tapeout in China at this point is significant, since last November TSMC and Samsung have stopped shipping AI-related chips at 7nm and...
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