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I meant lower-than-ELK dielectrics in the metal stack, since wiring is now where a lot of the capacitive load (and therefore power consumption) is.
For high-speed circuits which are on all the time you use fast but leaky ELVT transistors, but many applications have blocks which are not always...
That's what I meant when I said lower C isn't going to save us, it's not dropping very rapidly -- even lower-K dielectrics are unlikely, wires are getting more densely packed, gate capacitance is dropping a bit as smaller transistors give more drive but again this is low -- real channel length...
Even if the problem of thermal resistance though the stacked chips can be magically solved, that still leaves the power density problem, which is still going up none-by-node because density is growing faster than power per gate is decreasing, and there's no signs of this getting any better -- in...
If you look at the power/performance curves from one node to the next, for power-critical applications you find that somewhere not far off the same performance (clock rate) is the best choice -- you drop the voltage a bit (maybe a few 10s of mV), keep the same clock rate, and save power/flop...
The problem with stacking for logic (unlike memory) is power density and heat extraction; the power density (W/mm2) for a single layer of logic is already going up node by node because density is going up faster than power per gate is shrinking, so it's getting more and more difficult to cool...
I said that gaming PCs (CPUs) are a relatively small and shrinking part of the total leading-edge silicon market; yes they're still growing -- at least, for the time being -- but the total market is predicted to grow faster, and the vast majority of this growth is predicted to be in AI...
All true -- but you're still looking at today's HPC, which is not where the massive use of these processes is predicted to be... ;-)
Nvidia standalone GPUs are trying to push the biggest performance possible out of a given-sized piece of silicon, often reticle sized in their biggest parts --...
Regardless of what gamers think, gaming PCs (CPUs) are a relatively small and shrinking part of the total leading-edge silicon market -- the dominant market driver in these timescales (18A vs. N2) will be HPC at the hyperscalars, more specifically AI which will be >10x bigger than gaming CPUs --...
Except "perfomance" in HPC nowadays (and especially in future) is more likely to mean "most efficient/dense" not "highest clock rate", especially in what is predicted to be the dominant market driver which is AI not traditional CPUs.
The problem Intel may have is that they still seem to mentally think "HPC=Highest GHz clock rate" because this is the marketing point for their x86 CPUs -- fastest single-core boost frequency to make a headline against AMD, for example.
This is less and less important even for desktop/laptop...
Yes, but even the TSMC HPC libraries are denser than Intel -- as Scotten said above Intel use more relaxed design rules and fewer EUV layers (and presumably fewer DP EUV layers too...) so 18A is just plain inherently less dense.
OTOH it may have higher ultimate performance, if you can afford...
When you say
I assume you mean it's lower cost *per wafer* (in the same fab)?
Given the density difference (IIRC this is quite large?) this could mean the cost per chip (same function) is similar or maybe higher in 18A than TSMC 2nm -- and that's ignoring yield and fab utilization (and running...
I don't think there's much doubt that BSPD will deliver the *technical* benefits claimed -- lower voltage drops and access resistance, easier signal routing due to lack of conflict with power routing.
Whether there will be corresponding technical *disadvantages* -- worse hotspots, cooling...
Given that thermocouples/thermoelectric coolers are very inefficient and power-hungry, using them to try and cool "hot chips" will increase overall power dissipation, not reduce it... :-(
I don't think we're disagreeing here... ;-)
One problem is that "PPA" is too simplistic -- if one process is better on all three counts (power *and* performance *and* area) than another then it's obviously "the best", but that's not the issue here -- it's not even the case with the different...
The argument about who is right about whether 18A or N3P is better misses the point, which is that there's not always a single "better", depending on the process priorities.
Historically Intel have valued performance (clock rate) over everything else (density, power consumption, yield...)...
