Array
(
    [content] => 
    [params] => Array
        (
            [0] => /forum/threads/a-review-of-intels-first-foundry-attempt.22547/
        )

    [addOns] => Array
        (
            [DL6/MLTP] => 13
            [Hampel/TimeZoneDebug] => 1000070
            [SV/ChangePostDate] => 2010200
            [SemiWiki/Newsletter] => 1000010
            [SemiWiki/WPMenu] => 1000010
            [SemiWiki/XPressExtend] => 1000010
            [ThemeHouse/XLink] => 1000970
            [ThemeHouse/XPress] => 1010570
            [XF] => 2021770
            [XFI] => 1050270
        )

    [wordpress] => /var/www/html
)

A review of Intel's first Foundry Attempt

Artificer60

Well-known member
It is a bit long, but it is an interesting take on Intel's first attempt to enter the foundry business. I'd be interested in hearing a bit more about Daniel Nenni's experience at TSMC when they lost the Altera business. I did find it interesting that TSMC viewed the experience as a lesson to learn from. Hopefully Intel will develop a similar attitude under Lip-Bu Tan.

 
True, I was at TSMC FAB 12 when the story broke about Altera defecting to Intel. Morris Chang did in fact announce it over the PA and said it would be a learning experience. I do not think TSMC could have prevented this however, it really was about Altera not being able to compete with Xilinx on a level process playing field.

I worked with Altera down to 40nm. Altera and TSMC were closely coupled. TSMC used Altera FPGAs to ramp processes and Altera was first to a new node which was a big deal in the FPGA business back then. Xilinx had a similar relationship with UMC, in fact, a complete floor in UMC HQ was dedicated to Xilinx employees. It really was like a JV for process development. Unfortunately, Xilinx and UMC fell behind at 65nm and 40nm so Xilinx jumped to TSMC at 28nm. In fact, Xilinx beat Altera to 28nm silicon. It was a very wise move for Xilinx, absolutely.

The mistake TSMC made was providing a level playing field for Altera and Xilinx and treating the competitors equally thus ignoring the previous close relationship with Altera. It was the Morris Chang way, be a friend to all. Xilinx was clearly beating Altera at the silicon level, Xilinx had one of the best foundry teams I have every worked with and they still are today. Altera had no choice but to pivot to Intel and the rest as they say is history. Intel ended up buying Altera for a premium and Xilinx went on to dominate the market in partnership with TSMC.

The transition from TSMC to Intel was a big challenge for Altera. I still had ties to Altera and was told that the first DRC manual was redacted and unusable. The PDK was not good for foundry customers either. This caused delays for Altera and Xilinx sped ahead. I heard of similar problems with the first foundry customers Intel pursued back then. It is now said that Intel Foundry failed due to not being customer centric, which is true, but in reality Intel did not have the necessary tools (PDKs) and ecosystem to be successful in the foundry business.
 
The mistake TSMC made was providing a level playing field for Altera and Xilinx and treating the competitors equally thus ignoring the previous close relationship with Altera. It was the Morris Chang way, be a friend to all. Xilinx was clearly beating Altera at the silicon level, Xilinx had one of the best foundry teams I have every worked with and they still are today. Altera had no choice but to pivot to Intel and the rest as they say is history. Intel ended up buying Altera for a premium and Xilinx went on to dominate the market in partnership with TSMC.

That sounds more like a mistake for Altera than TSMC. Altera turned one risk (design) into two (design and Intel foundry).
 
True, I was at TSMC FAB 12 when the story broke about Altera defecting to Intel. Morris Chang did in fact announce it over the PA and said it would be a learning experience. I do not think TSMC could have prevented this however, it really was about Altera not being able to compete with Xilinx on a level process playing field.

Given that you think that it could not have been prevented, what learnings do you think TSMC ended up taking from the whole event?
 
True, I was at TSMC FAB 12 when the story broke about Altera defecting to Intel. Morris Chang did in fact announce it over the PA and said it would be a learning experience. I do not think TSMC could have prevented this however, it really was about Altera not being able to compete with Xilinx on a level process playing field.

I worked with Altera down to 40nm. Altera and TSMC were closely coupled. TSMC used Altera FPGAs to ramp processes and Altera was first to a new node which was a big deal in the FPGA business back then. Xilinx had a similar relationship with UMC, in fact, a complete floor in UMC HQ was dedicated to Xilinx employees. It really was like a JV for process development. Unfortunately, Xilinx and UMC fell behind at 65nm and 40nm so Xilinx jumped to TSMC at 28nm. In fact, Xilinx beat Altera to 28nm silicon. It was a very wise move for Xilinx, absolutely.

The mistake TSMC made was providing a level playing field for Altera and Xilinx and treating the competitors equally thus ignoring the previous close relationship with Altera. It was the Morris Chang way, be a friend to all. Xilinx was clearly beating Altera at the silicon level, Xilinx had one of the best foundry teams I have every worked with and they still are today. Altera had no choice but to pivot to Intel and the rest as they say is history. Intel ended up buying Altera for a premium and Xilinx went on to dominate the market in partnership with TSMC.

The transition from TSMC to Intel was a big challenge for Altera. I still had ties to Altera and was told that the first DRC manual was redacted and unusable. The PDK was not good for foundry customers either. This caused delays for Altera and Xilinx sped ahead. I heard of similar problems with the first foundry customers Intel pursued back then. It is now said that Intel Foundry failed due to not being customer centric, which is true, but in reality Intel did not have the necessary tools (PDKs) and ecosystem to be successful in the foundry business.
I used to really like the Altera toolset for their FPGA's. IIRC, they were power hungry though, and Xilinx had more hardware options. Xilinx tools on the other hand were very clunky. I am guessing that the modern toolset for Xilinx is pretty amazing. Sadly, I haven't done any FPGA work in a while. The products I have been working on the last couple of decades require less cost and power than an FPGA design can give. They were super cool though!
 
The transition from TSMC to Intel was a big challenge for Altera. I still had ties to Altera and was told that the first DRC manual was redacted and unusable. The PDK was not good for foundry customers either. This caused delays for Altera and Xilinx sped ahead. I heard of similar problems with the first foundry customers Intel pursued back then. It is now said that Intel Foundry failed due to not being customer centric, which is true, but in reality Intel did not have the necessary tools (PDKs) and ecosystem to be successful in the foundry business.
The comment about the manual with the redacted information reminds me of the ridiculous levels that "protecting" IP were said to have reached at Intel. I was once told by an Intel employee that the height of the D1X fab building was considered IP. This despite the fact that anyone with a pair of eyes and an understanding of basic trigonometry could easily determine that by themselves.

Somehow I don't think that is what Andy Grove meant by "only the paranoid survive".

For all his many faults, I believe that Gelsinger understood that Intel needed a much more open approach if Intel was going to be taken seriously as a foundry player. And to my understanding Intel is being much more open and willing to conform to industry standards than they were in their last foundry attempt. I expect Tan to double down on what Gelsinger started there.
 
That sounds more like a mistake for Altera than TSMC. Altera turned one risk (design) into two (design and Intel foundry).

Altera was sold for a premium so someone made money. Spinning Altera out was the right thing for Intel to do. Hopefully it gets sold.

Given that you think that it could not have been prevented, what learnings do you think TSMC ended up taking from the whole event?

It was humbling for sure. It is good to be humbled when you are #1. I did not see Intel acquiring Altera at the time but rumor has it Altera threatened Intel with going back to TSMC to put the pressure on.
 
Few remember that Intel's first foundry attempt was when they were a memory company.

They had tons of capacity, and memory was getting too cheap, so back then they did try a few contract manufacturing projects at that spare cap.
 
but in reality Intel did not have the necessary tools (PDKs) and ecosystem to be successful in the foundry business.
That’s it - and it was super painful to explain to them what they were missing because the technology group controlled all the resources and proprietary knowledge about design and routing rules and wouldn’t /couldn’t explain or consider changes. I love the pizza analogy. It’s like Intel got incredibly good at making the best non-traditional pizza in the world (BBQ chicken like CPK ?), but then was only willing to make tiny changes for customers. Some of the examples:
* Customers wanted pepperoni (traditional standard cell libraries characterized for a standard design flow) but could only get spicy chicken sausage (slightly modified Intel internal standard cells with slightly different characterizations, that were still optimized for Intel design methodology and led to tons of setup and hold violations with normal design methodology)
* Customers wanted mozzarella cheese (dense routing) but Intel had optimized for the chicken and onion topping, and only offered Gouda (performance oriented, with only unidirectional routing on the first four layers, if I remember correctly)
* Customers also had to add additional cheese to their working design, just to make the cooking process work (live metal fill for CMP).
* Finally, there was no way to do a comparative taste test (measure PPA) or improvement against other pizza makers because Intel foundry didn’t have the full set of industry standard RTL-level IP (or really the standard cells or memories at 22nm or even 14nm) to do DCTO.

And by the time they finally invested in filling out their foundry offering for 10nm, their process issues and delays driven by their over-aggressive 10nm goals forced a company-reset.
 
That’s it - and it was super painful to explain to them what they were missing because the technology group controlled all the resources and proprietary knowledge about design and routing rules and wouldn’t /couldn’t explain or consider changes. I love the pizza analogy. It’s like Intel got incredibly good at making the best non-traditional pizza in the world (BBQ chicken like CPK ?), but then was only willing to make tiny changes for customers. Some of the examples:
* Customers wanted pepperoni (traditional standard cell libraries characterized for a standard design flow) but could only get spicy chicken sausage (slightly modified Intel internal standard cells with slightly different characterizations, that were still optimized for Intel design methodology and led to tons of setup and hold violations with normal design methodology)
* Customers wanted mozzarella cheese (dense routing) but Intel had optimized for the chicken and onion topping, and only offered Gouda (performance oriented, with only unidirectional routing on the first four layers, if I remember correctly)
* Customers also had to add additional cheese to their working design, just to make the cooking process work (live metal fill for CMP).
* Finally, there was no way to do a comparative taste test (measure PPA) or improvement against other pizza makers because Intel foundry didn’t have the full set of industry standard RTL-level IP (or really the standard cells or memories at 22nm or even 14nm) to do DCTO.

And by the time they finally invested in filling out their foundry offering for 10nm, their process issues and delays driven by their over-aggressive 10nm goals forced a company-reset.
My current belief is that Intel must sell off their foundry business to remain viable. In order for that foundry business to become viable itself, IFS must have new leadership that recognizes what it takes to compete with the leading foundry services globally. I think that current Intel leadership is SO engrained in vertical design integration (ie, foundry processes are aligned with only Intel digital design team needs), that it can't fathom how to offer competitive foundry services to the masses.

The design team has its own demons to battle. They need to perfect their tile technology ASAP if they have any hope of remaining competitive. They need to quit relying on having a superior foundry process for their designs to out perform the competition. The latency in the current tile design is simply embarrassing for the likes of such great design engineers.

Perhaps this will require a mindset reset as well?
 
My current belief is that Intel must sell off their foundry business to remain viable. In order for that foundry business to become viable itself, IFS must have new leadership that recognizes what it takes to compete with the leading foundry services globally. I think that current Intel leadership is SO engrained in vertical design integration (ie, foundry processes are aligned with only Intel digital design team needs), that it can't fathom how to offer competitive foundry services to the masses.

The design team has its own demons to battle. They need to perfect their tile technology ASAP if they have any hope of remaining competitive. They need to quit relying on having a superior foundry process for their designs to out perform the competition. The latency in the current tile design is simply embarrassing for the likes of such great design engineers.

Perhaps this will require a mindset reset as well?
Imo it will kill the company it's not like AMD Situation where the fabs were never good AMD always had good designer than fabs for Intel they had good designer but their fabs were the best so much good stuff came out of it.
Intel should try to get customers

Samsung is also a IDM it competes with everyone and yet Apple (one of its competitors) sources Memory(Ram and Storage)/Display from Samsung it's all about Tech you need to have the best tech to justify move to your foundry.
 
My current belief is that Intel must sell off their foundry business to remain viable. In order for that foundry business to become viable itself, IFS must have new leadership that recognizes what it takes to compete with the leading foundry services globally. I think that current Intel leadership is SO engrained in vertical design integration (ie, foundry processes are aligned with only Intel digital design team needs), that it can't fathom how to offer competitive foundry services to the masses.

The design team has its own demons to battle. They need to perfect their tile technology ASAP if they have any hope of remaining competitive. They need to quit relying on having a superior foundry process for their designs to out perform the competition. The latency in the current tile design is simply embarrassing for the likes of such great design engineers.

Perhaps this will require a mindset reset as well?
Does Intel have the engineering talent and knowhow to compete with foundries like GF, UMC and Samsung (let alone TSMC)?
 
IFS must have new leadership that recognizes what it takes to compete with the leading foundry services globally. I think that current Intel leadership is SO engrained in vertical design integration (ie, foundry processes are aligned with only Intel digital design team needs), that it can't fathom how to offer competitive foundry services to the masses.
Intel has come a long way since ICF days. They have been forced to move to a more fabless design / foundry style methodology for all their products in order to outsource many to TSMC. That has in turn, compelled the technology group to substantially foundry-ize their internal ecosystem, except for the areas where they offer unique features (backside power planning and routing, EMIB), moving them from a 90% standard foundry flow to a 99% standard approach. Plus Intel seems to have staffed better this time around for customer and ecosystem enablement.
 
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I don't think Intel lacks engineering talent. I think where they come up short is experience in how to work with foundry customers. Time will fix that if Intel's finances don't sink them first.
 
Imo it will kill the company it's not like AMD Situation where the fabs were never good AMD always had good designer than fabs for Intel they had good designer but their fabs were the best so much good stuff came out of it.
Intel should try to get customers
It will kill the company as it exists today. Intel has had many great designs (and of course some not so great) to prove they can lead the industry by years. I do agree that they relied too heavily on leading the industry by beating everyone with a proprietary process to give their designs more transistors, and higher clocks. As it turns out, this has gotten WAY to expensive to rely so heavily on.

Intel can absolutely design themselves into competition without vertical integration with an internal fab having fundamental advantages over the rest of the worlds foundry services. They just need to start with this thinking from the ground up. Exe. Yes, it is better for performance to go monolithic .... but it is too expensive SO you have to design for the latency of off-chip interfacing and design the best off-chip interface and packaging interconnect methods.
Does Intel have the engineering talent and knowhow to compete with foundries like GF, UMC and Samsung (let alone TSMC)?
We will see I think.

Intel has come a long way since ICF days. They have been forced to move to a more fabless design / foundry style methodology for all their products in order to outsource many to TSMC. That has in turn, compelled the technology group to substantially foundry-ize their internal ecosystem, except for the areas where they offer unique features (backside power planning and routing, EMIB), moving them from a 90% standard foundry flow to a 99% standard approach. Plus Intel seems to have staffed better this time around for customer and ecosystem enablement.
Intel has done some pretty fast "about-face" moves in the past (P4->Conroe?). I think that the current Arrow Lake implementation has some serious latency issues that are crippling it ..... likely because of having to deal with a MCM vs monolithic design. I also feel that Intel has gone the "best fab process at all cost" route for so long that the idea of something being "too expensive" appears foreign to them (from the outside looking in). I hope that is also changing.

I don't think Intel lacks engineering talent. I think where they come up short is experience in how to work with foundry customers. Time will fix that if Intel's finances don't sink them first.
... and this is also a concern I share. There is more to being a successful foundry service than just having good foundry processes and equipment.
 
My current belief is that Intel must sell off their foundry business to remain viable. In order for that foundry business to become viable itself, IFS must have new leadership that recognizes what it takes to compete with the leading foundry services globally. I think that current Intel leadership is SO engrained in vertical design integration (ie, foundry processes are aligned with only Intel digital design team needs), that it can't fathom how to offer competitive foundry services to the masses.

The design team has its own demons to battle. They need to perfect their tile technology ASAP if they have any hope of remaining competitive. They need to quit relying on having a superior foundry process for their designs to out perform the competition. The latency in the current tile design is simply embarrassing for the likes of such great design engineers.

Perhaps this will require a mindset reset as well?
 
Their "great" design team sure took their time recongnising the merit/threat of chiplets ("tiles").
The mantra of Zen's ~decade long path to success being ~solely due to processs IMO, is untrue & unfair to AMDs ingenious architecture. They persisted & eventually minimised Zen's inherent core coherence latency problems. Their design teams may now face an equally insurmountable IP moat to compete with chiplets.
 
Altera was sold for a premium so someone made money. Spinning Altera out was the right thing for Intel to do. Hopefully it gets sold.

Intel to sell majority stake in Altera for $4.46 billion to fund revival effort​


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FILE PHOTO: Illustration shows Intel logo

(Reuters) -Intel has agreed to sell a 51% stake in its Altera programmable chip business to buyout firm Silver Lake for $4.46 billion, in the first major move under new CEO Lip-Bu Tan to revive the struggling American chipmaker.

(Silver Lake is close to Hock Tan helping him form Avago and acquire Broadcom.) D.A.N.

The deal, announced on Monday, values Altera at $8.75 billion, a sharp decline from the nearly $17 billion Intel paid in 2015.

The sale will provide Intel with a cash boost as the once-leading chipmaker aggressively cuts costs after heavy investments to become a contract manufacturer under former top boss Pat Gelsinger strained finances.

Shedding assets, including Intel's stake in Altera, is at the center of Tan's strategy to streamline the chipmaker after several CEOs in the past failed to diversify beyond the company's mainstay PC and server chip business for years.

The leadership missteps have left Intel struggling to gain a footing in the AI industry dominated by Nvidia while rival AMD threatens its stronghold of the central processor market.

"Today's announcement reflects our commitment to sharpening our focus, lowering our expense structure and strengthening our balance sheet," said CEO Tan, who took the helm after Gelsinger's ouster in December.

Since last year, Intel has taken steps to spin Altera out as a separate unit. Altera makes programmable chips that can be used for various purposes in industries ranging from telecom to the military.

The deal is expected to close in the second half of 2025, after which Intel expects to deconsolidate Altera's financial results from Intel's statements.

Raghib Hussain, who was an executive at custom AI chipmaker Marvell Technology, will succeed Sandra Rivera as Altera CEO from May 5. Altera generated revenue of $1.54 billion in 2024, a mere 3% of total sales, and posted an operating loss of $615 million.

After buying Altera in 2015, Intel had planned to move Altera's chip production into its own factories from rival TSMC which was at the time starting to gain a technological edge.

However, Altera lost market share to its top rival, Xilinx, which was acquired by AMD, as the transition to Intel's factories was long and costly.

(Altera also lost market share due to Intel mismanagement. It was impossible to work with them as a partner at that time.) D.A.N.

Reuters had first reported in November Silver Lake was among potential suitors competing for a stake in Altera.

 
Their "great" design team sure took their time recongnising the merit/threat of chiplets ("tiles").
The mantra of Zen's ~decade long path to success being ~solely due to processs IMO, is untrue & unfair to AMDs ingenious architecture. They persisted & eventually minimised Zen's inherent core coherence latency problems. Their design teams may now face an equally insurmountable IP moat to compete with chiplets.
I agree. It took AMD 2-3 iterations to get the chiplet design operating at a level that could compete with Intel's monolithic approach. I suspect it was more than just a little bit difficult :).
 
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