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Intel CEO Hands Over 18A Panther Lake Chip to Lenovo

Daniel Nenni

Admin
Staff member
intel-ceo-pat-gelsinger-hands-over-first-18a-panther-lake-sample-lenovo__750.jpg


In a significant milestone for both Intel and Lenovo, Intel CEO Pat Gelsinger officially handed over the first 18A Panther Lake sample to Lenovo during the recent TechWorld event. This pivotal moment represents more than just the exchange of cutting-edge technology; it marks a critical step in Intel’s strategy to reclaim its leadership in the semiconductor industry, particularly through AI-powered advancements in chip development. As Lenovo integrates Intel’s most advanced chip technology, the collaboration between these tech giants demonstrates the ongoing innovation driving AI in both personal computing and enterprise solutions.

Key Things to Know:​

  • Intel's 18A Panther Lake: A cutting-edge AI-powered chip, crucial to Intel's plans for semiconductor leadership.
  • Collaboration with Lenovo: This strategic partnership leverages AI to drive innovation in computing solutions.
  • Intel’s Competitive Edge: The 18A process is vital for Intel to compete with global rivals like TSMC in advanced chip manufacturing.
  • Future of AI and Computing: The Panther Lake chip is poised to transform AI applications in personal and enterprise computing devices.

As Intel continues to push the boundaries of what’s possible with its 18A process node, the Panther Lake chip is set to play a crucial role in reshaping the future of computing, particularly in AI-driven devices. This collaboration with Lenovo further emphasises the role of AI in the future of semiconductors, making this event a key moment not just for Intel, but for the broader tech industry.

The introduction of the 18A Panther Lake also highlights Intel's ambition to strengthen its position against competitors like TSMC, making strides toward dominating the semiconductor space once again. This move reinforces Intel’s long-term goals and its commitment to leading innovation in AI and chip design.

The 18A Panther Lake Milestone: What It Means for Intel​

The release of Intel’s 18A Panther Lake chip is not just a technical achievement; it’s a cornerstone of Intel’s strategic roadmap. As the company pushes to advance its 18A process node, this milestone is pivotal in Intel’s journey to reassert its dominance in semiconductor manufacturing and AI-powered chip innovation.

Intel’s 18A process is central to the company’s future chip designs, promising enhanced performance and power efficiency. However, achieving the required yield rates for this advanced node has not been without its challenges. Intel has faced scrutiny over its ability to meet these targets, particularly as global competitors like TSMC push forward in the same race. Intel’s 18A struggles have been well-documented, and the Panther Lake chip represents a turning point in overcoming these hurdles.

Quote from Pat Gelsinger:​

“The 18A process represents a leap forward in chip manufacturing, paving the way for future AI-driven designs,” explained Intel CEO Pat Gelsinger during the Lenovo TechWorld 2024 event.

This breakthrough is especially important for Intel as the Panther Lake chip aims to address previous yield struggles and align with the company’s ambitions to lead in AI chip development. By delivering on the promises of the 18A process, Intel is positioning itself to regain competitiveness, particularly in the race with TSMC for semiconductor leadership.

Furthermore, Panther Lake's design highlights Intel’s commitment to developing AI-optimised chips, ensuring they can meet the growing demand for AI computing across industries. This achievement not only strengthens Intel’s standing in the market but also reassures its partners, such as Lenovo, of its capacity to deliver cutting-edge solutions for the future of computing.

Intel and Lenovo: Strategic Partnership in AI and Chip Development​

The collaboration between Intel and Lenovo has long been instrumental in advancing AI-driven technologies, and the handover of the 18A Panther Lake chip underscores the growing importance of this partnership. With both companies dedicated to advancing AI and chip development, this collaboration is positioned to reshape how AI is integrated into personal computing and enterprise solutions.

At TechWorld 2024, Lenovo showcased its commitment to leveraging AI across its devices, from AI-powered PCs to enterprise-level solutions. The integration of Intel’s advanced 18A chip plays a pivotal role in these ambitions, offering Lenovo the cutting-edge technology it needs to build smarter and more efficient systems. Intel’s ability to deliver AI-optimised chips is crucial for Lenovo’s vision of embedding AI deeper into its product ecosystem, allowing for more natural and seamless user experiences.

Quote from Lenovo CEO Yiyi Yuanqing:​

“Our collaboration with Intel on AI-driven chip solutions is key to our vision for smarter technology,” Lenovo CEO Yiyi Yuanqing noted during the announcement at TechWorld 2024.

The Intel-Lenovo partnership goes beyond product-level innovation; it is central to Lenovo’s broader AI goals. The 18A Panther Lake chip, designed to meet the increasing demands of AI, will help Lenovo achieve breakthroughs in AI-powered PCs, data processing, and enterprise solutions. This partnership aligns with Lenovo's goal of developing technology that empowers users, offering faster, more intuitive AI-driven interactions.

Intel’s role in this partnership extends to its foundry ambitions as well. As Intel shifts its focus toward becoming the world’s No. 2 foundry by 2030, its collaboration with Lenovo ensures a steady demand for its advanced chip designs, particularly as AI becomes more integral to modern computing. This strategic alignment between Intel’s foundry goals and Lenovo’s AI ambitions reinforces their shared vision of driving innovation in the AI and semiconductor space.

As showcased during Lenovo TechWorld 2024, the collaboration between Intel and Lenovo is vital for accelerating AI-driven innovation in personal and enterprise computing solutions. Pat Gelsinger’s handover of the first 18A Panther Lake chip underscores the importance of this partnership in shaping the future of AI-powered devices.

Intel’s 18A process is expected to power the next generation of AI-driven Lenovo devices, cementing Intel’s place in the global semiconductor race.

AI-Driven Innovations Powering Intel’s 18A Panther Lake​

The development of Intel’s 18A Panther Lake chip is not only a breakthrough in semiconductor design but also a testament to how AI is transforming the entire chip manufacturing process. Leveraging AI tools throughout the design and production phases, Intel has been able to enhance both the efficiency and precision of its chip designs, marking a significant step forward in the industry.

AI plays a critical role in optimising the architecture of the Panther Lake chip, making it more suited for AI-intensive applications in both personal computing and enterprise solutions. These advancements allow Intel to address the growing demand for AI-optimised chips, which are essential for powering everything from AI-driven software to high-performance enterprise systems. AI-driven design tools have helped Intel streamline complex processes, ensuring that each chip meets the highest standards for both performance and energy efficiency.

Quote from Intel’s Executive Team:​

“AI allows us to not only speed up the design process but to make our chips smarter and more efficient,” said Intel’s executive team during TechWorld 2024.

AI’s influence extends to the manufacturing process, where it is used to improve yield rates and overcome the challenges of producing chips at advanced nodes like the 18A process. This ability to fine-tune production through AI-powered tools ensures that Intel remains competitive in the semiconductor market, particularly as rivals like TSMC push forward with their own innovations. The Panther Lake chip, designed with AI at its core, demonstrates Intel’s commitment to leveraging cutting-edge technology in both design and manufacturing.

Moreover, the Panther Lake chip is uniquely positioned to power a new era of AI-driven applications, from AI-powered personal devices to advanced enterprise systems that require vast computational resources. These innovations are central to Intel’s broader strategy of embedding AI deeper into its chip designs, ensuring that its products not only meet current needs but also anticipate future demands in AI technology.

Challenges on the Horizon: The Semiconductor Race with TSMC​

As Intel pushes forward with its ambitious 18A Panther Lake chip, the company faces fierce competition from rivals like TSMC, particularly in the race to dominate AI-driven semiconductor innovation. Both companies are focused on advancing their process node technologies, with Intel’s 18A process and TSMC’s continued breakthroughs placing them in direct competition for leadership in the semiconductor industry.

The 18A Panther Lake chip is crucial to Intel’s strategy to reclaim its position as a leader in semiconductor technology. Intel has been vocal about its intention to surpass competitors, particularly TSMC, which has maintained a significant lead in advanced node production. TSMC’s prowess in achieving high yield rates and rapid advancements in process technology has made it a formidable player, but Intel is leveraging the 18A process as a key differentiator in this race.

Quote from Intel CEO Pat Gelsinger:​

“Intel is committed to reclaiming its leadership in semiconductor technology, and the 18A process is key to this effort,” Gelsinger said during the TechWorld 2024 event.

Intel’s struggle with yield rates in its 18A process has been well documented, raising concerns about whether the company can deliver on its promises. However, with the Panther Lake chip’s delivery to Lenovo, Intel is signalling that it is on track to address these challenges and remain competitive. The 18A chip’s success is vital not only for Intel’s future but also for its ability to compete directly with TSMC in the AI-driven semiconductor space. For a deeper dive into Intel’s struggles and the ongoing race with TSMC, check out our Electropages article covering the topic in more detail.

The stakes are high as both Intel and TSMC battle for dominance in this fast-paced sector. AI chip manufacturing has become a critical focus, and the ability to push forward with increasingly advanced nodes like Intel’s 18A or TSMC’s equivalent offerings will determine which company can lead in future AI-powered innovations. With Intel’s latest efforts and the strategic importance of the Panther Lake chip, the company aims to close the gap with TSMC and secure its place at the forefront of semiconductor innovation.

Intel’s Foundry Ambitions: The Road to 2030​

Intel’s long-term vision for the future is not just about its own chip production but also about becoming a dominant force in the foundry market. By 2030, Intel aims to become the world’s second-largest foundry, a bold objective that hinges on its ability to deliver cutting-edge chips like the 18A Panther Lake while attracting third-party clients to its foundry services.

Central to this goal is Intel’s five-nodes-in-four-years strategy, which seeks to accelerate the development of advanced process nodes, including the 18A process, which plays a pivotal role in the company’s foundry ambitions. This aggressive timeline underscores Intel’s commitment to rapid innovation and its drive to compete with established foundry leaders such as TSMC and Samsung. By delivering the Panther Lake chip to Lenovo, Intel is signaling to the industry that it is ready to meet the needs of external clients looking for high-performance, AI-driven semiconductor solutions.

Quote from Intel CEO Pat Gelsinger:​

“Our goal of becoming the world’s second-largest foundry is closely tied to the success of our 18A process,” Gelsinger noted during the Panther Lake handover at TechWorld 2024.

The 18A Panther Lake chip is not only critical for Intel’s internal product lineup but also for its foundry business, as the company seeks to position itself as a key supplier for companies needing advanced semiconductor manufacturing. By offering the 18A process to third-party clients, Intel aims to differentiate itself through its AI-optimised chips, which are increasingly in demand for applications such as AI computing, data centers, and high-performance enterprise solutions.

Intel’s foundry business will play a crucial role in its overall growth strategy as the company targets a larger slice of the global semiconductor manufacturing market. The success of chips like Panther Lake will help Intel secure partnerships with leading tech companies and solidify its position in the foundry space. For more insights into Intel's foundry strategy and ambitions, read our Electropages article on how Intel plans to reshape the foundry landscape by 2030.

With the semiconductor industry continuing to expand, Intel’s ability to scale its foundry services and provide high-performance chips will be instrumental in achieving its ambitious goals. The 18A process will be a key enabler in helping Intel meet this challenge, setting the stage for the company’s transformation into a leading foundry service provider over the next decade.

The Future of AI-Powered Semiconductor Design​

As Intel continues to push the boundaries of AI-powered semiconductor design, the delivery of the first 18A Panther Lake chip to Lenovo marks a critical milestone in the company’s journey. This chip not only represents a major leap in process node technology but also underscores Intel’s commitment to leading the next generation of AI-driven innovation in the semiconductor industry.

Looking forward, the 18A process will be at the heart of Intel’s roadmap, enabling advanced AI applications across personal computing, data centers, and enterprise solutions. With AI playing a pivotal role in chip design and manufacturing, Intel’s ability to integrate AI-driven efficiencies into its chips will be crucial for maintaining its competitive edge.

Furthermore, Intel’s partnerships with industry leaders like Lenovo will continue to drive AI advancements in devices and systems that power the world’s most complex technologies. These strategic collaborations will enhance both companies’ positions in the rapidly evolving AI and semiconductor landscapes.

Quote from Intel CEO Pat Gelsinger:​

“With the first 18A Panther Lake sample now in Lenovo’s hands, we are well-positioned to push the boundaries of AI-powered chip design,” Gelsinger stated at the TechWorld 2024 event.

As the semiconductor race with competitors like TSMC heats up, Intel’s innovations in AI semiconductor design will be instrumental in shaping the future of the industry. By combining cutting-edge chip technology with a focus on AI integration, Intel is poised to play a significant role in the AI revolution.

In the coming years, the success of chips like 18A Panther Lake will not only strengthen Intel’s foundry business but also redefine the possibilities of AI-powered computing. With a clear vision and solid technological foundation, Intel is ready to lead the charge into the future of AI semiconductor innovation.

As the tech world watches closely, Intel’s progress with the 18A process will be a key factor in determining its dominance in the global semiconductor market. The race is on, and with AI driving the next wave of semiconductor design, Intel’s innovations are set to leave a lasting mark on the industry.

 
I don't really get it why so many articles are repeating the same mantra "Intel’s struggle with yield rates in its 18A process has been well documented", when Intel's been constantly repeating that 18A is ok. Is there actually any credible source of Intel's 18A yield struggle? If anything, there were some rumors on Twitter about 18A being quite good.
 
I don't really get it why so many articles are repeating the same mantra "Intel’s struggle with yield rates in its 18A process has been well documented", when Intel's been constantly repeating that 18A is ok. Is there actually any credible source of Intel's 18A yield struggle? If anything, there were some rumors on Twitter about 18A being quite good.
Are there any credible sources of Intel's 18A yields being acceptable, at this point in its life?

What yield IS acceptable, at this point in its life?
 
Are there any credible sources of Intel's 18A yields being acceptable, at this point in its life?

What yield IS acceptable, at this point in its life?
If you think that Pat is a reliable source, then yes. Btw, I'm not claiming that yields are good, just that there are no reliable data for any claims. Seems like people lack stories and are making up things. We simply have to wait and see.
 
I guess the proper question is what is reasonable defect density at its HVM point in life, and at earlier points like -3Q, -2Q, which is where 18A is now?
 
Yes, but note that in-house manufactoring means Intel can afford MP at lower yields and still keep margins constant or better in comparison to manufacturing same product at TSMC. For external customers the calcualtion is different of course, but if Intel's management is not completely retarded, they will prioritize cash flow and sales over margins at this point.
 
I don't really get it why so many articles are repeating the same mantra "Intel’s struggle with yield rates in its 18A process has been well documented", when Intel's been constantly repeating that 18A is ok. Is there actually any credible source of Intel's 18A yield struggle? If anything, there were some rumors on Twitter about 18A being quite good.

If you compare Intel 18A to TSMC N2 it is not good yield. For Intel 60%+ is good yield. For TSMC 80%+ is good yield. For Samsung 40%+ is good yield. IDM versus Foundry. Please stop comparing Intel to TSMC. Two completely different businesses. Compare Intel to Samsung and Intel is killing it!
 
If you compare Intel 18A to TSMC N2 it is not good yield. For Intel 60%+ is good yield. For TSMC 80%+ is good yield. For Samsung 40%+ is good yield. IDM versus Foundry. Please stop comparing Intel to TSMC. Two completely different businesses. Compare Intel to Samsung and Intel is killing it!
However, if Intel is going to be a serious foundry player they need to get to a point where their yields are at least within spitting distance of TSMC. Intel may not be there now, but they have to get there. To do that they have to change their development paradigm from performance first then yield to performance and yield enhancement simultaneously. I think Intel's stated intention of becoming a foundry player invites the comparison.
 
However, if Intel is going to be a serious foundry player they need to get to a point where their yields are at least within spitting distance of TSMC. Intel may not be there now, but they have to get there. To do that they have to change their development paradigm from performance first then yield to performance and yield enhancement simultaneously. I think Intel's stated intention of becoming a foundry player invites the comparison.
Your statement indicates you have never worked at a development fab or talked with folks who have worked at multiple firm's TD sites. Just about everything in this post is incorrect or against industry standard practices, but I will leave it at that.
If you compare Intel 18A to TSMC N2 it is not good yield. For Intel 60%+ is good yield. For TSMC 80%+ is good yield. For Samsung 40%+ is good yield. IDM versus Foundry. Please stop comparing Intel to TSMC. Two completely different businesses. Compare Intel to Samsung and Intel is killing it!
Just from public information and how TSMC'S past nodes have gone, I can all but garentuee that 18A yield is ahead of N2 for two reasons. One is because N2 is entering HVM 3-5Q later (per TSMC'S own claims) and if Intel is taken at their word for the claims they made at the BOQ3, 18A yield is tracking a bit ahead of N7 and slightly behind N5 (TSMC's self reported fastest yield ramp ever). Therefore for N2 yield to be currently ahead of 18A, N2 needs to be 4-6Q ahead of N5 at the same point in development. There is no indication this is happening (if it was TSMC would be shouting it from the rooftops like they did with N5) and with all of the added complexity and mask layers for GAA there is simply no way it is over a year ahead of N5. Reason two is that N2 was only recently transferred to F20 (and the HVM site rather than the TD site is where TSMC does final yield drive) so N2 literally cannot be a in an HVM ready state by EOY 2024.
 
TSMC N2 yields were mentioned earlier this year here: https://www.anandtech.com/show/21413/tsmc-performance-and-yields-of-2nm-on-track-mass-production-to-start-in-2025#:~:text=TSMC states that 'N2 development,%, depending on the batch. but 256 Mb SRAM is a very small die size, so it might seem the defect density is still high at that point in time.
My understanding is that SRAM also tends to have a lower DD than logic at iso process health due to the higher uniformity of an array vs random logic. But with GAA maybe this isn't the case because HDC SRAM would be using minimum Z nanosheet which are the most suspectable to the high LER from EUV potentially screwing with their Vmin and SRAM yield. But I don't have enough device knowledge to really have anything more than an intuition. Also with how TSMC locks down design rules for DFM LLEs dragging down logic yields are less of a factor.
 
If you think that Pat is a reliable source, then yes. Btw, I'm not claiming that yields are good, just that there are no reliable data for any claims. Seems like people lack stories and are making up things. We simply have to wait and see.
There are NO reliable sources for this type of data - yield % is highly proprietary and not shared by any makers, Intel or others.
Wait and see for what? The next "guess" at what is acceptable - this varies with each device and each maker.
It's such nonsense to hear all these declarations of good/bad yield, when at best these are educated guesses.
Even on mature products/nodes, this data is quite valuable and drives profit margins and process improvement planning.
These are not the types of things that fabs share at any point in time, apart from vague references at most.
 
Wait and see for what? The next "guess" at what is acceptable - this varies with each device and each maker.
It's such nonsense to hear all these declarations of good/bad yield, when at best these are educated guesses.
Wow, wait and see the products. Educated guesses are not nonsense. They are all we are going to get. Seeing how products based on certain process behave; availability, binning, clocks, die size,... is enough for some. If Intel releases Panther Lake with 6ghz clocks and wide availability of the top bin, then we can with high probability say that 18A performs well and has good yields. On the other hand, if they repeat Cannon Lake, then we can safely say that 18A is a total pig. If you want precise number, then you are out of luck.
 
Wow, wait and see the products. Educated guesses are not nonsense. They are all we are going to get. Seeing how products based on certain process behave; availability, binning, clocks, die size,... is enough for some. If Intel releases Panther Lake with 6ghz clocks and wide availability of the top bin, then we can with high probability say that 18A performs well and has good yields. On the other hand, if they repeat Cannon Lake, then we can safely say that 18A is a total pig. If you want precise number, then you are out of luck.
By your logic N3 yield is terrible because LNL and ARL both have smaller die sizes, slower ramps, and clock lower than RPL. And we ALL know N3 yield is NOT terrible. Clock speed is more heavily influenced by design than process (see ARL having a large clock speed regression vs RPL despite being two nodes ahead of RPL). Also just because die size is small doesn't mean that yield is necessarily bad. As an example take meteor lake. Intel says that intel 4 DD in 2023 was far ahead of 10nm in 2019; and yet ice lake had a 1.75x die size. Another example is A14 on N5 being 88mm2 vs 122mm2 of icelake, we all know N5 was in a better place in 2020 than i10nm was in 2019, yet ice lake die size was 1.39x. Looking at the TEMs is a good way to asses process health (if the process is bad a trained eye can pick it out with ease) and product ramp can give you a good indication but that is also influenced by design (ie cost, business cycles/the economy, and competitive position).
 
Your statement indicates you have never worked at a development fab or talked with folks who have worked at multiple firm's TD sites. Just about everything in this post is incorrect or against industry standard practices, but I will leave it at that.
You would be mistaken. But I will concede I made a gross over simplification here. I should have been more precise.

Yield curves are roughly logarithmic, asymptotically approaching some low number of defects per cc as shown in the curves posted above. So, yield starts out really poor (I'm often amazed that anything can be determined at all on early wafers) and improves rapidly at first but slows over time. Additionally, any given process goes through several iterations as new yield vehicles are introduced. At each iteration the yield takes a step backwards and ground has to be regained.

As Daniel Nenni pointed out the yield Intel needs on internal products can be lower than the yield that is acceptable to a foundry customer, because they can recoup some of the margins by capturing both the manufacturing margins and the design/sales margin. So what I should have said is that in the past Intel has defined HVM ready as meeting parametric design parameters (i.e. performance) at lower yield targets than a foundry can accept. That is not to say the defect density doesn't matter, because better defect performance results in more profits for Intel. But I would argue that Intel is willing to sacrifice some level of profit to "keep Moore's Law alive" and are willing to accept lower yields early in the process life cycle to do it. But if they want to bring in foundry customers on new nodes early, Intel will need to place more emphasis at driving down defect density more quickly than they have in the past while maintaining the same pace of parametric improvement before calling a process HVM ready.
 
couple points:

Intel had a press conference stating that they sampled a product that will be releases in 2nd half 2025.
Intel cannot capture "manufacturing margin" when their manufacturing has negative margin.
Intels cost issues are not yields, it is output per tool. The yield by they time this ramps to more than 20K wafers per month (2026) will be fine and competitive.
reminder: Ramping a new technology and fab ALWAYS lowers margin for 6-12 months. It is broken out that way on every earnings report for the last 20 years.
 
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