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12 events found.

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  • October 2025

  • Thu 23
    updated chips act web banner text 3000 x 1000 px 2048x683
    October 23

    EU Chips Act 2.0 Webinar

    Online

    Europe's Role & Chips Act 2.0 Priorities The European Union is currently developing a new version of the Chips Act program. The European Chips Act 2.0 represents a strategic initiative …

    Continue reading "EU Chips Act 2.0 Webinar"

  • Thu 23
    Synopsys IP Designs Edge AI 400x400
    October 23 @ 10:00 AM - 11:00 AM

    Webinar: IP Design Considerations for Real-Time Edge AI Systems

    Online

    *Work Email Required* Edge AI systems increasingly require on-chip integration of large-capacity memory, compute engines, and inference-optimized accelerators—all within strict power, latency, and footprint constraints. This webinar provides a an …

    Continue reading "Webinar: IP Design Considerations for Real-Time Edge AI Systems"

  • Tue 28
    Screenshot 2025 09 04 013215
    October 28 @ 9:00 AM - 10:00 AM

    Webinar: Rapid Design Space Exploration of AI functions on Lattice FPGAs using Catapult High-Level Synthesis

    Online

    The increasing demand for accelerated computing solutions calls for an agile hardware design methodology to be able to keep up with fast evolving landscape of algorithms. Traditional hardware design methodology …

    Continue reading "Webinar: Rapid Design Space Exploration of AI functions on Lattice FPGAs using Catapult High-Level Synthesis"

  • Wed 29
    Screenshot 2025 09 23 153345
    October 29 @ 9:00 AM - 10:00 AM

    Webinar: Accelerating RTL-to-GDS digital implementation with generative and agentic AI: powered by Aprisa AI & the Siemens EDA AI System

    Online

    As digital chip design complexity grows, engineering teams face increasing pressure to meet aggressive PPA targets on tight schedules. To overcome this challenge, the EDA industry requires a revolutionary shift …

    Continue reading "Webinar: Accelerating RTL-to-GDS digital implementation with generative and agentic AI: powered by Aprisa AI & the Siemens EDA AI System"

  • Wed 29
    6aa32750 74d5 44ba aae6 84fdf47dd3ba
    October 29 @ 11:00 AM - 12:00 PM

    Webinar: Exploring AMD Kria SOM for ROS 2 Multi-Node Communications with TSN Acceleration

    Online

    Description BLT, an AMD Premier Design Services Partner and Authorized Training Provider, presents this webinar. Unlock the potential of the AMD Kria SOM and discover Time-Sensitive Networking (TSN) benefits for …

    Continue reading "Webinar: Exploring AMD Kria SOM for ROS 2 Multi-Node Communications with TSN Acceleration"

  • Wed 29
    Screenshot 2025 09 29 234253
    October 29 @ 11:00 AM - 12:00 PM

    Webinar: 5 Expectations for the Memory Market in 2026

    Online

    October 29, 2025 - 11:00 AM EST    October 30, 2025 – 10:00 AM JST/KST Discover the 5 Critical Memory Market Trends Reshaping Semiconductors in 2026 AI workloads, HBM4 adoption, and …

    Continue reading "Webinar: 5 Expectations for the Memory Market in 2026"

  • November 2025

  • Mon 3
    Virtual Training AdvancedPackaging (Asia) September 2025 800x800 Shopify Semiconductor Ecosystem Overview July v1.jpg
    November 3 @ 8:30 AM - 5:00 PM

    Webinar: Advanced Packaging and Material Characterization for Microelectronics: SEMI Training

    Online

    Strengthen your knowledge and skills by learning about new packaging technologies in Fan-in, Fan-out WLP, Embedded packaging technology, System on Chip (SOC), System in Package (SiP), 3D IC, WLP, TSV, …

    Continue reading "Webinar: Advanced Packaging and Material Characterization for Microelectronics: SEMI Training"

  • Tue 4
    1759132416 2c664ecb7afb35b8
    November 4 @ 10:00 AM - 11:00 AM

    Webinar: Design and Stability Analysis of GaN Power Amplifiers using Advanced Simulation Tools

    Online

    November 4, 2025 | 10:00 AM PST This webinar will present advanced simulation tools and techniques for the design of GaN power amplifiers with increased assurance of stable operation that …

    Continue reading "Webinar: Design and Stability Analysis of GaN Power Amplifiers using Advanced Simulation Tools"

  • Wed 5
    Screenshot 2025 10 17 021248
    November 5 @ 8:00 AM - 8:30 AM

    Webinar: Imaging Radar for Autonomous Systems: Patent Trends, Key Players & Technology Focus

    Online

    Details Imaging radar has rapidly evolved into a critical technology for autonomous systems, with patent activity accelerating significantly over the past decade. From 2015 to 2024, global imaging radar patent …

    Continue reading "Webinar: Imaging Radar for Autonomous Systems: Patent Trends, Key Players & Technology Focus"

  • Wed 5
    Screenshot 2025 10 29 071423
    November 5 @ 8:00 AM - 9:00 AM

    Webinar: HLV – Formal Verification of Synthesizable C++/SystemC Designs

    Online

    High-Level Synthesis (HLS) is design flow in which design intent is described at a higher level of abstraction such as SystemC/C++/Matlab/etc. HLS tools are expected to synthesize this code to …

    Continue reading "Webinar: HLV – Formal Verification of Synthesizable C++/SystemC Designs"

  • Wed 5
    1759427613 7a1e7d60a0e237c6
    November 5 @ 10:00 AM - 11:00 AM

    Webinar: Insights on Spectrum for 6G

    Online

    About this event Join Roger Nichols, 6G Program Manager, for an insightful discussion on the 6G spectrum. He will cover the current status of 6G technologies, standards, and policies for …

    Continue reading "Webinar: Insights on Spectrum for 6G"

  • Wed 5
    Screenshot 2025 10 22 035247
    November 5 @ 10:00 AM - 12:00 PM

    Digital Twin Models for Semiconductor Manufacturing Unit Process: A SEMI Master Class

    Online

    Join us for this engaging Master Class with Benyamin Davaji, PhD, Assistant Professor of Electrical and Computer Engineering at Northeastern University and Peter Doerschuk, Professor of Electrical and Computer Engineering and Biomedical Engineering at Cornell University, as they explore the role of digital twin models in advancing semiconductor manufacturing. The masterclass will highlight how data-guided …

    Continue reading "Digital Twin Models for Semiconductor Manufacturing Unit Process: A SEMI Master Class"

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