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As AI workloads scale into the thousands of accelerators and hundreds of terabytes of distributed memory, traditional interconnects cannot deliver the deterministic latency, bandwidth efficiency, or memory semantic operations required for modern training clusters. UALink provides a purpose built accelerator fabric leveraging 224G SerDes, fixed 64 byte flits, compressed transaction formats, and high efficiency TL/DLL …
Ensure fabrication success with proven HDI design techniques and real-world tools. Overview: As AI accelerators and edge compute modules push PCB densities to their physical limits, HDI design has become the defining skill separating production-ready boards from layouts that fail at fabrication. This webinar walks through the complete HDI workflow inside Allegro X using a …
In this webinar, Marvell will present how its team accelerates passive interposer routing for advanced 2.5D/3.5D multi die designs by bringing early, physics based signal integrity feedback into each routing iteration. Rather than relying on repeated, compute intensive 3D FEM cycles during development, Marvell uses a Method of Moments (MoM) early SI check available within …
Physical AI is increasingly popular in applications requiring real-time decision making and autonomous operation. Different from NPUs for cloud platforms, Physical AI processors can be made application-specific. By jointly tuning their ISA and memory architecture to the network models required by the application, power consumption and silicon area are drastically reduced. Synopsys ASIP Designer is …
As semiconductors continue to scale, designers are turning to 3DIC architectures to meet increasing demands for performance, energy efficiency, and functional density in data centers and edge AI applications. However, stacking multiple dies introduces new multiphysics challenges including electrical, structural, and thermal issues. Join this webinar to learn how RedHawk-SC Electrothermal enables designers to analyze …
Abstract Dive into the future of Bluetooth audio with Ceva and Dolphin Semiconductor’s breakthrough 12nm Smart Edge AIoT SoC solution. This webinar shows how advanced wireless connectivity, integrated AI processing, and premium audio technologies and power management come together to deliver superior performance, lower power, and faster time to market. Learn how a combined Ceva …
As power integrity challenges increase with advanced nodes and multi-die architectures, EMIR analysis must evolve beyond traditional signoff. In this Synopsys webinar, we will show how RedHawk-SC is expanding its capabilities not only to enhance EMIR analysis, but also to enable IR-aware Static Timing Analysis (IR-STA) and IR-driven ECO (IR-ECO) flows. Join us to learn how tighter integration …
Data rates have doubled, but validation methods have not kept pace. As PCIe, DDR, and multi-terabit optical interconnects evolve, engineers are encountering signal integrity challenges much earlier in the design process. Join Niels Fache, Senior Vice President and General Manager of Design Engineering Software at Keysight, to explore where validation becomes more challenging as speeds …
