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14 events found.

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Today

June 2025

Fri 13
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June 13 @ 9:00 AM - 10:00 AM

Webinar: Implementing High Performance Real-Time Designs Using Synopsys ARC Processor IP

Online

Featured Speakers: Rick Furtner, Processor IP Applications Engineering, Synopsys Why You Should Attend: Join us for an insightful webinar where we delve into the latest advancements in Synopsys ARC Processor …

Continue reading "Webinar: Implementing High Performance Real-Time Designs Using Synopsys ARC Processor IP"

Fri 13
rick furtner headshotqlt82ampwid375ampts1747161498795ampresponsiveampfitconstrainampdproff
June 13 @ 9:00 AM - 10:00 AM

Webinar: Implementing High Performance Real-Time Designs Using Synopsys ARC Processor IP

Online

Featured Speakers: Rick Furtner, Processor IP Applications Engineering, Synopsys Why You Should Attend: Join us for an insightful webinar where we delve into the latest advancements in Synopsys ARC Processor …

Continue reading "Webinar: Implementing High Performance Real-Time Designs Using Synopsys ARC Processor IP"

Wed 18
Ansys Logo featured 1
June 18 @ 8:00 AM - 9:00 AM

Webinar: Teaching Dynamic Analysis with Ansys LS-DYNA

Online

This webinar will teach explicit dynamics essentials, focusing on how Ansys LS-DYNA can be used to simulate and analyze dynamic events such as crashes, impacts, and high-speed motion. Attendees will …

Continue reading "Webinar: Teaching Dynamic Analysis with Ansys LS-DYNA"

Wed 18
Chris Crile
June 18 @ 8:00 AM - 9:00 AM

Webinar: Accelerating Functional Coverage with Questa One Sim CX

Online

This webinar introduces Questa One Sim CX, an innovative coverage-driven simulation solution that revolutionizes SystemVerilog UVM verification workflows. Traditional coverage closure methods, relying on constrained-random stimulus generation and iterative manual …

Continue reading "Webinar: Accelerating Functional Coverage with Questa One Sim CX"

Wed 18
Screenshot 2025 06 10 152140
June 18 @ 8:00 AM - 9:00 AM

Webinar: Eliminate Late Stage BOM Issues – Design Smarter from the Start

Online

DATE: Wednesday, June 18, 2025 TIME: 8:00am PDT | 11:00am EDT | 3:00pm GMT | 8:30pm IST Experience the future of Engineering BOM Management with OrCAD X. Our innovative Live BOM feature …

Continue reading "Webinar: Eliminate Late Stage BOM Issues – Design Smarter from the Start"

Wed 18
Screenshot 2025 06 10 152606
June 18 @ 9:00 AM - 10:00 AM

Webinar: Reimagine Semiconductor Fab Operations with the Digital Twin

Online

About This Webinar Are you ready to disrupt decades of outdated processes and lead a smarter, more sustainable future in semiconductor manufacturing? While the digital twin has long been a …

Continue reading "Webinar: Reimagine Semiconductor Fab Operations with the Digital Twin"

Thu 19
Digital Engineering for ePowertrain Development in automotive
June 19

Webinar: Digital Engineering for ePowertrain Development for Automotive

Online

This webinar demonstrates the end-to-end technology used in developing an electric powertrain for automotive applications using a model-based systems engineering (MBSE) framework. DATE: June 19, 2025 Venue: Virtual Overview As …

Continue reading "Webinar: Digital Engineering for ePowertrain Development for Automotive"

Thu 19
Ansys Logo featured 1
June 19 @ 10:00 AM - 11:00 AM

Webinar: Supercharge Simulation Predictions with an AI SaaS Platform

Online

Join our webinar to learn how cybersecurity systems protect data, ease cloud computing concerns, and boost confidence in cloud-native solutions with insights from leading providers like AWS. DATE/TIME: June 19 …

Continue reading "Webinar: Supercharge Simulation Predictions with an AI SaaS Platform"

Thu 19
Screenshot 2025 06 10 152817
June 19 @ 10:00 AM - 11:00 AM

CadenceTECHTALK: High Performance Hierarchical IR Signoff for Large SoCs and 3D-ICs

Online

Webinar Details IR signoff for advanced SoCs and 3D-ICs is a major challenge due to extremely large and complex power networks that can exceed 100 billion nodes. Designers are faced …

Continue reading "CadenceTECHTALK: High Performance Hierarchical IR Signoff for Large SoCs and 3D-ICs"

Tue 24
Screenshot 2025 06 12 130410
June 24 @ 10:00 AM - 4:00 PM

Digital Logic 101 Workshop

Online

This workshop provides a foundational introduction to digital logic, tailored for beginners and professionals who want to understand the principles of digital design. The emphasis of this course is on: …

Continue reading "Digital Logic 101 Workshop"

Wed 25
ESDA Intro to Design and EDA Master Class Tile
June 25 @ 10:00 AM - 11:30 AM

ESD Alliance Master Class: Introduction to Chip Design and Electronic Design Automation

Online

Overview of the design of today's complex chips with Electronic Design Automation tools. June 25, 2025 | 10:00am-11:30am PT Complex semiconductor chips power today’s cell phones, cars, computers, and more. …

Continue reading "ESD Alliance Master Class: Introduction to Chip Design and Electronic Design Automation"

Wed 25
tzrhytoera9kqtmtwsy8
June 25 @ 1:00 PM - 2:00 PM

Webinar: Verifying Chiplet-based Systems

Online

Verifying Chiplet-based Systems (online) As the semiconductor industry increasingly embraces chiplet-based architectures, the complexity of system integration and verification has grown exponentially. Verifying these modular systems demands new approaches, tools, …

Continue reading "Webinar: Verifying Chiplet-based Systems"

Thu 26
dana neustadter headshot 2qlt82ampts1748284420149ampresponsiveampfitconstrainampdproff
June 26 @ 9:00 AM - 10:00 AM

Webinar: Security for AI SoCs: Practical Solutions for the Challenges of Today and Tomorrow

Online

Featured Speakers: Mike Borza, Scientist and Principal Security Technologist, Synopsys Dana Neustadter, Senior Director of Product Management, Synopsys As AI systems become increasingly vital across industries, ensuring their security and …

Continue reading "Webinar: Security for AI SoCs: Practical Solutions for the Challenges of Today and Tomorrow"

Thu 26
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June 26 @ 11:00 AM - 12:00 PM

Webinar: Integrating HLS Modules into Block Designs

Online

Description BLT, an AMD Premier Design Services Partner and Authorized Training Provider, presents this webinar. Are you struggling to bridge the gap between high-level algorithm design and efficient FPGA implementation? …

Continue reading "Webinar: Integrating HLS Modules into Block Designs"

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