• WEBINAR: 448G: Ready or Not, Here it Comes!

    Date: Aug 05, 2025 | 10:00 AM PDT Featured Speakers: Priyank Shukla, Director of Product Management, Synopsys Kent Lusted, Distinguished Architect, Synopsys   Why You Should Attend: Understand Industry Readiness: Explore the challenges and opportunities in the race to 448G SerDes and assess if the industry is prepared for this leap in high-speed serial interfaces. Learn About Emerging Standards: Gain insights into the …

  • Webinar: 448G: Ready or Not, Here it Comes!

    Online

    Featured Speakers: Priyank Shukla, Director of Product Management, Synopsys Kent Lusted, Distinguished Architect, Synopsys Why You Should Attend: Understand Industry Readiness: Explore the challenges and opportunities in the race to 448G SerDes and assess if the industry is prepared for this leap in high-speed serial interfaces. Learn About Emerging Standards: Gain insights into the latest advancements in standards shaping …

  • SNUG Korea 2025

    Grand InterContinental Seoul Parnas Grand InterContinental Seoul Parnas, Teheran-ro, 521, Seoul, Gangnam District, Korea, Republic of

    Connecting the Synopsys User Community Since 1991, the Synopsys Users Group (SNUG) has represented a global design community focused on innovating from Silicon to Systems. Today, as the electronics industry’s largest user conference, SNUG brings together over 12,000 Synopsys tool and technology users across North America, Europe, Asia, and Japan. In addition to peer-reviewed technical …

  • SNUG Vietnam 2025

    Sheraton Saigon Grand Opera Hotel Sheraton Saigon Grand Opera Hotel, 88 Đ. Đồng Khởi, Bến Nghé, Quận 1, Hồ Chí Minh, Viet Nam

    Connecting the Synopsys User Community Since 1991, the Synopsys Users Group (SNUG) has represented a global design community focused on innovating from Silicon to Systems. Today, as the electronics industry’s largest user conference, SNUG brings together over 12,000 Synopsys tool and technology users across North America, Europe, Asia, and Japan. In addition to peer-reviewed technical …

  • Synopsys Processor IP Summit 2025

    Synopsys Building 1 800 North Mary Avenue, Sunnyvale, CA, United States

    Attend this free one-day event to gain in-depth insights on processor IP solutions for handling a variety of modern SoC workloads, including artificial intelligence, automotive/functional safety, IoT and more. Why Attend? Synopsys experts, partners and users will share their knowledge about current trends and technology advancements impacting SoC computing. Understand how our latest CPU IP, based …

  • Webinar: Static Verification of RTL DFT Connectivity – Getting it Right the First Time!

    Online

    Featured Speakers: Kiran Vittal, Synopsys Ayush Goyal, Synopsys As System-on-Chip (SoC) designs become increasingly complex, ensuring reliable Design-for-Test (DFT) connectivity at the RTL stage is more important than ever. This Synopsys webinar will demonstrate how static verification techniques, powered by TestMAX™ Advisor on the VC SpyGlass® platform, can help you address connectivity challenges efficiently and …

  • Webinar: Why Choose PCIe 5.0 for Power, Performance, and Bandwidth at the Edge?

    Online

    Featured Speakers: Gustavo Pimentel, Principal Product Marketing Manager, Synopsys As edge, mobile and automotive applications demand faster data processing, lower latency, and reduced power consumption, PCI Express® 5.0 has emerged as the optimal interconnect standard. Doubling the data rate of PCIe 4.0 while enabling lane reduction, PCIe 5.0 helps SoC designers achieve significant savings in …

  • Webinar: ML-Enhanced TCAD Calibration With 10x Reduction in Time to Results

    Online

    Date: Oct 15, 2025 | 5:00 PM PST Featured Speakers: Saurabh Suryavanshi, Product Manager, Synopsys Youngkwon Cho, Senior Staff Engineer, Synopsys Dipanjan Basu, Principal Engineer, Synopsys Calibration is an essential part of enabling TCAD products usages inside Semiconductor fab. Synopsys has been leading the development of ML-enhanced calibration that reduce the time to results by 10x while improve the …

  • Webinar: IP Design Considerations for Real-Time Edge AI Systems

    Online

    *Work Email Required* Edge AI systems increasingly require on-chip integration of large-capacity memory, compute engines, and inference-optimized accelerators—all within strict power, latency, and footprint constraints. This webinar provides a an overview of IP architecture and integration methodologies that support real-time AI workloads at the edge. We’ll cover: • Memory and compute efficiency: Techniques for optimizing …

  • Chiplet Summit 2026

    Santa Clara Convention Center Santa Clara Convention Center, 5001 Great America Pkwy, Santa Clara, CA, United States

    All the Solutions for Developing Chiplets 2025 Keynote Addresses from Industry Leaders: Alphawave Semi, Arm, Cadence Design Systems, Keysight, Open Compute Project, Synopsys, Teradyne 2025’s Main Topics Included: AI/ML Acceleration, Open Chiplet Economy, Advanced Packaging Methods, Die-to-die Interfaces, Working with Foundries signup to be a 2026 SPONSOR / Exhibitor REGISTER HERE