All the Solutions for Developing Chiplets 2025 Keynote Addresses from Industry Leaders: Alphawave Semi, Arm, Cadence Design Systems, Keysight, Open Compute Project, Synopsys, Teradyne 2025’s Main Topics Included: AI/ML Acceleration, …
For more than three decades, SNUG Silicon Valley has connected engineers, designers, and thought leaders with technical experts to network and share best practices for tackling design and verification challenges …
As AI workloads scale into the thousands of accelerators and hundreds of terabytes of distributed memory, traditional interconnects cannot deliver the deterministic latency, bandwidth efficiency, or memory semantic operations required …
Continue reading "Webinar: Understanding UALink Architecture: A Protocol Deep Dive"
In this webinar, Marvell will present how its team accelerates passive interposer routing for advanced 2.5D/3.5D multi die designs by bringing early, physics based signal integrity feedback into each routing …
Physical AI is increasingly popular in applications requiring real-time decision making and autonomous operation. Different from NPUs for cloud platforms, Physical AI processors can be made application-specific. By jointly tuning …
Continue reading "Webinar: Application-Specific Processors (ASIPs) for Physical AI"
As semiconductors continue to scale, designers are turning to 3DIC architectures to meet increasing demands for performance, energy efficiency, and functional density in data centers and edge AI applications. However, …
Continue reading "Webinar: Powering 3D Multi-Die Designs with RedHawk-SC Electrothermal"
As power integrity challenges increase with advanced nodes and multi-die architectures, EMIR analysis must evolve beyond traditional signoff. In this Synopsys webinar, we will show how RedHawk-SC is expanding its capabilities …
Continue reading "Webinar: RedHawk-SC: From EMIR Signoff to IR-Aware Design Closure"
In this webinar, Intel will present how EMIB-T (Embedded Multi-die Interconnect Bridge with TSVs) enables compact, cost-effective multi‑die design while sustaining the bandwidth and power efficiency required for AI and datacenter designs. …
Featured Speaker: Victoria Kolesov, Principal Engineer, Intel In this Synopsys webinar, Intel will present how its disaggregated designs across client and server platforms have driven the evolution of robust 3D …
