ASIP University Day: Domain-Specific Processor Design using ASIP Designer Application-specific instruction set processors (ASIPs) have established themselves as an important implementation option for modern SoCs, i.e. when standard processor IP cannot meet challenging application-specific requirements, and fixed hardware is not flexible enough. Heterogeneous multicore systems including ASIPs are now becoming more mainstream. Domains such as …
Synopsys Webinar: Tuesday, November 28, 2023 | 10-11 am. PT System-on-Chip (SoC) designs continue to grow in both size and complexity in order to meet the ever-growing performance and power demands associated with modern technology. To keep up with this fast-paced evolution, the corresponding design-for-test (DFT) logic required for manufacturing tests has also become more …
Synopsys Webinar – Part II In this 3-part Synopsys webinar series, we will present how hyperscale data centers are going through a paradigm shift with the advent of technologies like Artificial Intelligence (AI) and edge compute requiring hyperscale data centers to support exponential growth of data volume. This volume of network traffic demands an increase …
Continue reading "Webinar: CMOS Circuit Techniques for Wireline Transmitters Part II"
Increased vehicle connectivity options are vital to providing the best driving experience for consumers. However, the adoption of over-the-air software updates, numerous connectivity protocols (including Bluetooth, WiFi, 5G cellular, USB), and in-car networks like CAN, MIPI, and automotive Ethernet, accelerates cybersecurity risks. To mitigate risk and satisfy consumer demand for optimal security, SAE and ISO …
Continue reading "Webinar: The Path to ISO/SAE 21434 Cybersecurity Compliance"
Synopsys Webinar – Part III In this 3-part Synopsys webinar series, we will present how hyperscale data centers are going through a paradigm shift with the advent of technologies like Artificial Intelligence (AI) and edge compute requiring hyperscale data centers to support exponential growth of data volume. This volume of network traffic demands an increase …
Continue reading "Webinar: CMOS Circuit Techniques for Wireline Transmitters Part III"
Join us for an exclusive Synopsys webinar highlighting the recently unveiled, cutting-edge advancements in the next-generation Synopsys Verdi platform. Explore the power of AI-driven debug and new root cause analysis engines designed to speed-up bug finding, while experiencing enhanced usability through a refreshed graphical user interface. Learn about access to an integrated development environment (IDE) and a robust verification management …
What is SIPI SIG? The Synopsys SIPI SIG Event is for Synopsys customers to hear the latest advances and solutions in signal and power integrity from customers and partners. This event provides the opportunity for networking and discussion with fellow SIPI engineers to increase awareness of signal and power integrity issues within a forum for …
Continue reading "2024 Signal & Power Integrity (SIPI) SIG Event"
Thursday, February 8, 2024 | 9-10 a.m. PT The Universal Chiplet Interconnect Express (UCIe) v1.0 standard was introduced in March of 2022 and v1.1 was published in July 2023. There is a huge demand for an open chiplet ecosystem that will unleash innovation across the compute continuum which in turn increases the demand for power …
Continue reading "Webinar: Addressing UCIe 1.1 IP and System Level Verification Challenges"
The AC analysis is used to evaluate the stability of regulation loops of switched-mode power supplies, as well as the stability of networks of power supplies. Stability criteria like phase and gain margins, or the Middlebrook impedance criterion, can be applied to the Bode plots produced by the AC analysis. But it is very tricky …
Continue reading "Webinar: Fast & Accurate AC Analysis for DC-DC Power Converters"
Join us for an insightful Synopsys webinar that takes a deep dive into the growing world of automotive semiconductors. As the numbers of Advanced Driver Assistance Systems (ADAS) and Highly Automated Driving (HAD) chips increase dramatically, with constant Over-the-Air (OTA) updates and the emergence of Battery Electric Vehicles (BEV), numerous design challenges are faced by …
About this event The AppSec landscape is in constant flux. Every day we hear of new vulnerabilities and attack vectors we need to defend against. And now there are the security and legal implications of the rapid growth of AI. To put you on the right track, Synopsys is happy to announce the return of AppSec …
Hardware security is essential for high-performance computing (HPC), AI, and Edge IoT applications when designing SoCs in advanced process nodes. These designs include Gigabits of SRAM and require storing >16Kb of repair information to meet yield requirements. Designers are facing the challenges of creating secure, reliable, and cost-effective SoC designs in a timely manner. If …
Join us for an insightful presentation into the integration of Synopsys Verdi® and Euclide IDE, revolutionizing the debugging landscape for hardware designers. In this session, we’ll delve into next-generation Verdi’s integration with Euclide IDE, a cutting-edge integrated development environment. Discover how Euclide IDE empowers designers to find bugs earlier and optimize code for design and …
Continue reading "Webinar: Unlocking Next-Gen Debugging: Synopsys Verdi and Euclide IDE Integration"
