Architecting an SoC is a complicated step in building a successful chip. The first step is ensuring you have the critical requirements for your SoC captured so that the possible architectural options may be explored and the IP components that enable those architectures can be identified. Selecting the right IP can make or break your …
Attend this free one-day event to gain in-depth insights on processor IP solutions for handling a variety of modern SoC workloads, including artificial intelligence, automotive/functional safety, IoT and more. Why …
Accelerating Connectivity with the Versal Adaptive SOC Network on Chip Workshop This workshop introduces the AMD Versal network on chip (NoC) to users familiar with other SoC architectures. Besides providing …
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Essential Debugging Techniques Workshop This workshop is for hardware engineers, system architects, and anyone who wants to learn best practices for debugging challenging issues encountered while developing FPGAs, SoCs, PCBs, and embedded systems using the Vivado Design Suite. The features and capabilities of the Vivado Integrated Logic Analyzer are covered in lectures and demonstrations, along with …
