Webinar: Efficient and Robust Memory Verification in Modern SoCs Using Formal Equivalence Checker

Online

With the increasing complexity and importance of memories in modern ICs, there is a clear need for specialized tools and techniques for the design and verification of embedded memory blocks. Traditional methods like SPICE simulation and cell-based formal verification have limitations; SPICE offers circuit-level accuracy but limited coverage, while cell-based methods can't fully represent transistor-level …

Supercomputing 2024 (SC24)

Georgia World Congress Center 285 Andrew Young International Blvd NW, Atlanta, GA, United States

Program Each year, SC provides the leading technical program for professionals and students in the HPC community, as measured by impact, at the highest academic and professional standards. The Program is designed to share best practices in areas such as: algorithms; applications; architectures and networks; clouds and distributed computing; data analytics, visualization, and storage; machine …

Workshop on Open-Source EDA Technology (WOSET)

Online

Workshop on Open-Source EDA Technology The WOSET workshop aims to galvanize the open-source EDA movement. The workshop will (virtually) bring together EDA researchers who are committed to open-source principles to share their experiences and coordinate efforts towards developing a reliable, fully open-source EDA flow. The workshop will feature presentations that overview existing or under-development open-source …

Defect-Based Testing

Munich, Germany

Semiconductor and integrated circuit developments continue to proceed at an incredible pace. For example, today's application-specific ICs and microprocessors can contain upwards of 100 million transistors. Traditional testing relies on the stuck-at-fault (SAF) to model defect behavior. Unfortunately, the SAF model is a poor model for defects. Other models and strategies are required to catch …