From Theory to Practice: Applying Timing Constraints Workshop

Online

From Theory to Practice: Applying Timing Constraints Workshop Do you struggle to identify which constraints are needed for a design or how to properly input them? This workshop will cover how to use features in Vivado, clock domain crossing strategies, and how to get the most out of static timing analysis for Versal devices. This …

2025 SIA Awards Dinner

Signia by Hilton San Jose 170 S Market St, San Jose, CA, United States

Date: Nov. 20, 2025 Time: SIA Reception at 5:00 pm Dinner, Awards Presentations, & Keynote Remarks at 6:30 pm After-Dinner Reception at 8:30 pm Location: Signia by Hilton San Jose …

Webinar: Mastering Clock Domain Crossings (CDC) and Synchronization Techniques

Online

Description Clock domain crossings (CDCs) are a critical aspect of FPGA and embedded system design, and handling them correctly is essential for reliable operation. In this one-hour webinar, we’ll break down CDC fundamentals, explore best practices for managing single-bit and bus CDCs, and demonstrate how to leverage Xilinx Parameterized Macros (XPM) for seamless synchronization. Join …

2025 GSA Awards Dinner Celebration

Santa Clara Convention Center Santa Clara Convention Center, 5001 Great America Pkwy, Santa Clara, CA, United States

GSA recognizes semiconductor companies that have demonstrated excellence through their success, vision, strategy and future opportunities in the industry at its annual Awards Dinner Celebration. It is an honor to …

CadenceTECHTALK: Quantus Insight: Intelligent Parasitic Debugging, Optimization, and Signoff Closure

Online

Speaker: Kee Tat Ong, Principal Application Engineer 10:00am~11:00am Quantus Insight: Intelligent Parasitic Debugging, Optimization, and Signoff Closure 11:00am~11:15am Q&A Description: With more designs migrating to advanced process nodes, chips are …