SPIE Optifab 2025
Join colleagues at the largest optical manufacturing conference and exhibition in North America SPIE Optifab is the premier event to meet with top companies and learn about the latest optical …
14 events found.
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RISC-V Summit North America 2025
RISC-V is defining the future of open computing by providing unprecedented freedom to innovate. More than 13 billion RISC-V cores have shipped, powering new innovations in AI/ML, wireless, automotive, data …
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CadenceCONNECT: Photonics and Quantum Technologies
Event Summary The year 2025 is both a turning point for integrated photonics as a key enabler for AI, physical and infrastructure interconnect, and the International Year of Quantum (IYQ). …
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EU Chips Act 2.0 Webinar
Europe's Role & Chips Act 2.0 Priorities The European Union is currently developing a new version of the Chips Act program. The European Chips Act 2.0 represents a strategic initiative …
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Webinar: IP Design Considerations for Real-Time Edge AI Systems
*Work Email Required* Edge AI systems increasingly require on-chip integration of large-capacity memory, compute engines, and inference-optimized accelerators—all within strict power, latency, and footprint constraints. This webinar provides a an …
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2025 TSMC Open Innovation Platform Ecosystem Forum – Tokyo
Join us for the 2025 TSMC OIP ECOSYSTEM FORUM Get ready for an electrifying dive into the future of semiconductor design at the 2025 TSMC Global Open Innovation Platform® (OIP) Ecosystem …
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ICCAD 2025
Munich, Germany Munich, GermanyThe 2025 International Conference on Computer-Aided Design Call For Papers Jointly sponsored by IEEE and ACM, IEEE ICCAD is the premier forum to explore new challenges, present leading-edge innovative solutions, …
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Webinar: Rapid Design Space Exploration of AI functions on Lattice FPGAs using Catapult High-Level Synthesis
OnlineThe increasing demand for accelerated computing solutions calls for an agile hardware design methodology to be able to keep up with fast evolving landscape of algorithms. Traditional hardware design methodology …
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CadenceCONNECT: Jasper User Group 2025
San Jose Convention Center 150 W San Carlos St, San Jose, CA, United StatesCadenceCONNECT: Jasper User Group 2025 is October 29 and 30 in San Jose, CA. This interactive, in-depth technical conference connects designers, verification engineers, and engineering managers from around the world …
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Webinar: Accelerating RTL-to-GDS digital implementation with generative and agentic AI: powered by Aprisa AI & the Siemens EDA AI System
OnlineAs digital chip design complexity grows, engineering teams face increasing pressure to meet aggressive PPA targets on tight schedules. To overcome this challenge, the EDA industry requires a revolutionary shift …
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Webinar: Exploring AMD Kria SOM for ROS 2 Multi-Node Communications with TSN Acceleration
OnlineDescription BLT, an AMD Premier Design Services Partner and Authorized Training Provider, presents this webinar. Unlock the potential of the AMD Kria SOM and discover Time-Sensitive Networking (TSN) benefits for …
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Webinar: 5 Expectations for the Memory Market in 2026
OnlineOctober 29, 2025 - 11:00 AM EST October 30, 2025 – 10:00 AM JST/KST Discover the 5 Critical Memory Market Trends Reshaping Semiconductors in 2026 AI workloads, HBM4 adoption, and 3D NAND scaling—what’s next for the memory industry in 2026. The memory semiconductor industry is entering a critical inflection point. Explosive AI workloads are pushing …
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Semitracks Course: Wafer Fab Processing
Phoenix, AZ Phoenix, AZ, United StatesSemiconductor and integrated circuit developments continue to proceed at an incredible pace. The industry as a whole has gotten to this point of incredible complexity through the process of countless …
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Webinar: Advanced Packaging and Material Characterization for Microelectronics: SEMI Training
OnlineStrengthen your knowledge and skills by learning about new packaging technologies in Fan-in, Fan-out WLP, Embedded packaging technology, System on Chip (SOC), System in Package (SiP), 3D IC, WLP, TSV, …