RISC-V Summit Europe
June 5 - June 9
On 5-9th June, in Barcelona, RISC-V Summit Europe brings together developers, architects, technical decision makers, and policy makers from across the European RISC-V ecosystem. Attendees from academia, research, SMEs, industry, and open-source communities will gather to exchange knowledge, ideas, technologies, and research shaping the future of the RISC-V computing.
The event will include a single track of keynotes, invited and selected talks, alongside an exhibition showcasing the latest developments across industry and research, including technology demonstrations and poster sessions.
RISC-V Summit Europe is an opportunity not to be missed. Come to Barcelona from 5-9th June 2023 to be part of the new wave of European computing innovation!
The Program Committee
- Jan Andersson (Cobham Gaisler)
- Holger Blasum (Sysgo)
- Alex Bradbury (Igalia)
- Ramon Canal (UPC)
- Denis Dutoit (CEA)
- Angelo Garofalo (ETH Zürich)
- Benedikt Gierlichs (KU Leuven)
- Frederic Heitzmann (Tiempo Secure)
- John Hengeveld (Intel)
- Eyck Jentzsch (MINRES)
- Nick Kossifidis (FORTH)
- Marie-Minerve Louerat (LIP6)
- Andreas Mauderer (Bosch)
- Daniel Müller-Gritschneder (TU Munich), PC Co-Chair
- Jérôme Quévremont (Thales)
- Rihards Novickis (EDI, Latvia)
- Katzalin Olcoz Herrero (UCM)
- Borja Pérez Pavon (Univ. de Cantabria), Submission Chair
- Olivier Savry (CEA)
- Davide Schiavone (OpenHW Group)
- Georg Sigl (TUM), PC Co-Chair
- Jonathan Woodruff (Cambridge Univ.)
The Steering Committee
- Narcís Avellana (NVision)
- Teresa Cervero (BSC)
- Romain Dolbeau (SiPearl)
- Wolfgang Ecker (Infineon)
- Roger Espasa (Semidynamics)
- Christian Fabre (CEA)
- Frank K. Gürkaynak (ETH Zürich)
- Daniel Müller-Gritschneder (TU Munich)
- Borja Pérez Pavon (Univ. de Cantabria)
- Jérôme Quévremont (Thales R&T)
- Olivier Sentieys (INRIA, France)
- Philipp Tomsich (VRULL)
- Stefan Wallentowitz (Munich Univ. of Applied Sciences)
Local Organization
The event is organized by RISC-V International, BSC and BCO.
SALELE Double Patterning for 7nm and 5nm Nodes