The semiconductor industry is undergoing a transformative shift with the integration of AI into DRC workflows, as showcased in the Siemens EDA presentation at the 2025 TSMC OIP. Titled “AI-Driven DRC Productivity Optimization,” this initiative, led by Siemens EDA’s David Abercrombie alongside AMD’s… Read More
Electronic Design Automation
Emulator-Like Simulation Acceleration on GPUs. Innovation in Verification
GPUs have been proposed before to accelerate logic simulation but haven’t quite met the need yet. This is a new attempt based on emulating emulator flows. Paul Cunningham (GM, Verification at Cadence), Raúl Camposano (Silicon Catalyst, entrepreneur, former Synopsys CTO and lecturer at Stanford, EE292A) and I continue our series… Read More
IPLM Today and Tomorrow from Perforce
Today, Perforce IPLM stands at the intersection of data management, automation, and collaboration, shaping the way companies design the next generation of chips and systems. Looking ahead, its evolution will reflect the growing convergence of hardware, software, and AI-driven engineering.
Chiplets: Powering the Next Generation of AI Systems
AI’s rapid expansion is reshaping semiconductor design. The compute and I/O needs of modern AI workloads have outgrown what traditional SoC scaling can deliver. As monolithic dies approach reticle limits, yields drop and costs rise, while analog and I/O circuits gain little from moving to advanced process nodes. To sustain … Read More
Better Automatic Generation of Documentation from RTL Code
One technical topic I always find intriguing is the availability of links between documentation and chip design. It used to be simple: there weren’t any. Architects wrote a specification (spec) in text, in Word if they had PCs, or using “troff” or a similar format if they were limited to Unix platforms. Then the hardware designers… Read More
Liberty IP Excellence: Building a Robust Verification Framework for Automotive IPs
As 2025 draws to a close, the semiconductor industry continues to push boundaries, particularly in automotive applications where reliability is non-negotiable. At the TSMC Open Innovation Platform forum this year, a collaborative presentation by NXP Semiconductors and Siemens EDA stood out: “Liberty IP Excellence:… Read More
ASU Silvaco Device TCAD Workshop: From Fundamentals to Applications
The ASU-Silvaco Device Technology Computer-Aided Design Workshop is a pivotal educational and professional development event designed to bridge the gap between theoretical semiconductor physics and practical device engineering. Hosted by Arizona State University in collaboration with Silvaco, a leading provider of … Read More
PDF Solutions Calls for a Revolution in Semiconductor Collaboration at SEMICON West
SEMICON West was held in Phoenix, Arizona on October 7-9. This premier event brings the incredibly diverse global electronics supply chain together to address the semiconductor ecosystem’s greatest opportunities and challenges. The event’s tagline this year is:
Stronger Together — Shaping a Sustainable Future in Talent,… Read More
The Rise, Fall, and Rebirth of In-Circuit Emulation: Real-World Case Studies (Part 2 of 2)
Recently, I had the opportunity to speak with Synopsys’ distinguished experts in speed adapters and in-circuit emulation (ICE). Many who know my professional background see me as an advocate for virtual, transactor-based emulation, hence I was genuinely surprised to discover the impressive results achieved by today’s speed… Read More
Webinar – IP Design Considerations for Real-Time Edge AI Systems
It is well-known that semiconductor growth is driven by AI. That simple statement breaks down into many complex use cases, each with its own requirements and challenges. A webinar will be presented by Synopsys on October 23 that focuses on the specific requirements for one of the most popular use cases – AI at the edge. The speaker… Read More


Intel, Musk, and the Tweet That Launched a 1000 Ships on a Becalmed Sea