WP_Term Object
(
    [term_id] => 159
    [name] => Siemens EDA
    [slug] => siemens-eda
    [term_group] => 0
    [term_taxonomy_id] => 159
    [taxonomy] => category
    [description] => 
    [parent] => 157
    [count] => 749
    [filter] => raw
    [cat_ID] => 159
    [category_count] => 749
    [category_description] => 
    [cat_name] => Siemens EDA
    [category_nicename] => siemens-eda
    [category_parent] => 157
)
            
Q2FY24TessentAI 800X100
WP_Term Object
(
    [term_id] => 159
    [name] => Siemens EDA
    [slug] => siemens-eda
    [term_group] => 0
    [term_taxonomy_id] => 159
    [taxonomy] => category
    [description] => 
    [parent] => 157
    [count] => 749
    [filter] => raw
    [cat_ID] => 159
    [category_count] => 749
    [category_description] => 
    [cat_name] => Siemens EDA
    [category_nicename] => siemens-eda
    [category_parent] => 157
)

Market Trends Motivate a Shift-Left in Functional Verification

Market Trends Motivate a Shift-Left in Functional Verification
by Jean-Marie Brunet on 09-15-2016 at 4:00 pm

Today, in the context of functional verification, industry trends are based on the needs of prominent vertical markets. There is some overlap in what these markets need, but there are some use models that are very specific to each market.

We assert this because we have a lot of customers asking about emulation solutions not from the standpoint of methodology, but from the needs of their specific vertical market. These include networking, storage, mobile multimedia, and automotive.

 We’re excited about the new things Veloce has to offer these customers. A primary force behind these is a shift-left in the verification flow. We provide the means for that shift-left to become a reality.

A shift-left means that a lot of things companies used to do late in the verification flow cycle they now do much earlier. It also means that hardware and software verification is done at the same time, using either a software stack or script to generate the traffic flow. This way it’s clear very early on that the hardware being implemented behaves correctly with the software being provided.

A shift-left greatly reduces the risk of designing very large systems and ICs. So this is obviously an overlapping need and advantage for all the vertical markets. In addition, we have other new solutions for these markets.

Let’s start with networking. The biggest networking companies in the world need greater capacity to emulate their designs. Their chips are very big, so they need an emulator like Veloce, which is still the only emulator that can do a billion-gate design in a single monolithic box. Our competitors need a couple of boxes connected together to do that. Further, because of Veloce’s capacity, performance, and flexible use models, it is the industry’s leading networking emulation solution.

Most networking companies validate their chips in the lab using an Ethernet tester. This involves a lot of connections and a lot of cables to make those connections. Traffic is applied to the silicon to verify that the behavior of that particular design is running at-speed and the traffic is generated and behaving correctly. But, the verification process cannot begin until silicon is available. And if there is a problem at this stage, it takes a great deal of work, time, and money to fix…if you can fix it at all.

In response to requests from networking companies, our R&D team collaborated with Ixia to create an emulator-friendly network verification solution that is fully integrated with Ixia‘s number one Ethernet tester. Rather than creating a testbench for a particular networking chip and compiling it along with the design on the emulator, we use, directly, the Ixia script. The result is a cleaner setup for verifying Ethernet traffic and a shift-left in the design cycle using a solution that puts together the two leaders in the networking verification space.

In the storage market, the trend is toward bigger die sizes. So again, there’s a need for capacity and virtualization. There’s also more and more software content on storage devices that needs to be verified. ICE is still extremely important for the storage vertical market because of all the external connections to physical memory, and so on. But they need an ICE environment that is deterministic (i.e., repeatable) so that thorough debug can be completed.

This is why we launched our Veloce Deterministic ICE App in early 2016. With Veloce Deterministic ICE we have provided something in the ICE environment that is far better than anything our competitors can do. We made the ICE environment deterministic, so you can repeat the behavior of what you are verifying and therefore fix any bugs.

For the mobile multimedia market, we see two recent trends. Power is extremely important. They want to know if the chip is using what they are predicting in terms of power, rather than finding that problem on the board, which is way too late to fix. The Veloce Power App that was launch in 2015 has been very successful as a solution to this problem, including earning an EDA industry award.

The second trend for mobile multimedia companies is the need to verify hardware within the full software context of the application. Their end customers evaluate their chips by running something like an AnTuTu Benchmark. Based on the performance and metrics report they get on that benchmark, they’ll know if their chip performed correctly. So a shift-left is called for again because mobile multimedia companies want to validate their chip, not only from a testbench perspective, but within the full software context.

Finally, another big story in 2016 is the automotive market. Mentor has been very strong in the automotive market for system and ICs, so we have a lot of customer experience and knowledge and methodology and IP in this domain, and we are now seeing how emulation fits into the total solution. For example, advanced driver assistance systems (ADAS) must adhere to specific methodology requirements to verify that the chip is ISO 26262 Compliance. This requires a lot of full-system simulation and a lot of coverage performed on the chip. And this requires the capacity and performance of emulation and a shift-left in the verification flow.

To find out how your company can benefit from a shift-left emulation flow powered by the Veloce emulation platform and Veloce Apps, check out mentor.com. A good place to start is our whitepaper focusing on the networking market, Accelerating Networking Products to Market Using Ethernet VirtuaLAB.

Share this post via:

Comments

There are no comments yet.

You must register or log in to view/post comments.