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Webinar on coping with the complexities of 3D NAND design

Webinar on coping with the complexities of 3D NAND design
by Tom Simon on 12-03-2019 at 10:00 am

In order to beat Moore’s Law NAND Flash memories have moved from a planar topology to 3D construction. This allows for increased memory sized in much the same way a multistory building provides more building square footage on the same size building lot. Just like in building construction, adding a third dimension to the mix increases… Read More


Webinar – IP for securing automotive systems

Webinar – IP for securing automotive systems
by Tom Simon on 11-19-2019 at 10:00 am

Modern cars have about as much in common with their predecessors as modern cell phones have in common with dial up land-line phones. Cars now are loaded with a bevy of electronics, some of which serve the convenience of the driver and others are essential for vehicle operation and occupant safety. With the introduction of sophisticated… Read More


Webinar – 3D NAND Memory Cell Optimization

Webinar – 3D NAND Memory Cell Optimization
by Tom Simon on 11-07-2019 at 10:00 am

Flash memory has become ubiquitous, so much so that it is easy to forget what life before it was like. Large scale non-volatile storage was limited spinning disks, which were bulky, power hungry and unreliable. With NAND Flash, we have become used to carrying many gigabytes around with us all the time in the form of cell phones, USB… Read More


Rapid growth of AI/ML based systems requires memory and interconnect IP

Rapid growth of AI/ML based systems requires memory and interconnect IP
by Tom Simon on 11-07-2019 at 6:00 am

Artificial intelligence and machine learning (AI/ML) are working their way into a surprising number of areas. Probably the one you think of first is autonomous driving, but we are seeing a rapidly growing number of other applications as time goes on. Among these are networking, sensor fusion, manufacturing, data mining, numerical… Read More


“Connecting the Divide” at SEMICON Europa

“Connecting the Divide” at SEMICON Europa
by Paul Cohen on 10-29-2019 at 2:00 pm

Connecting the Divide between Design and Manufacturing is an overarching theme within the ESD Alliance as these two essential semiconductor disciples become more reliant on each other. It’s also the reason we’re hosting  SMART Design, the first system-centric series showcasing advances in electronic system design to be held… Read More


Statistically speaking you probably care about On-chip Variation

Statistically speaking you probably care about On-chip Variation
by Tom Simon on 10-22-2019 at 10:00 am

There are some metaphorical similarities between reaching timing signoff and driving a car to your destination. Most of us get in the car, turn the key and push the gas pedal to make it go. While we might have a cursory understanding of what makes it go, there are actually a lot of “moving part” under the hood in each instance. For most… Read More


The New Silvaco CEO is SURGING!

The New Silvaco CEO is SURGING!
by Daniel Nenni on 10-18-2019 at 6:00 am

One of my great pleasures in the semiconductor industry is meeting the people who have brought us to where we are today, at the forefront of modern life. One of those people is Babak Taheri, now CEO of Silvaco who I spent time with yesterday. Babak started in semiconductors around the same time I did 30+ years ago. He has a PhD in EECS and… Read More


Webinar – AI/ML SoC Memory and Interconnect IP Perspectives

Webinar – AI/ML SoC Memory and Interconnect IP Perspectives
by Tom Simon on 10-08-2019 at 10:00 am

For decades development work on Artificial Intelligence (AI) and Machine Learning (ML) was done on traditional CPUs and memory configurations. Now that we are in the “hockey stick” upturn in deployment of AI and ML, the search is on for the most efficient types of processing architectures. The result is a wave of development for… Read More


Webinar: OCV and Timing Closure Sign-off by Silvaco on Oct 10 at 10AM

Webinar: OCV and Timing Closure Sign-off by Silvaco on Oct 10 at 10AM
by Daniel Nenni on 10-01-2019 at 10:00 am

The old adage that goes the one constant thing you can always count on is change, could easily be reworded for semiconductor design to say the one constant thing you can count on is variation. This is doubly true. Not only is variation, in all its forms, a constant factor in design, additionally the methods of analyzing and dealing … Read More


3D TCAD Simulation for Power Devices

3D TCAD Simulation for Power Devices
by Daniel Payne on 08-30-2019 at 10:00 am

Silvaco: Split Gate, Figure 1

My first IC design back in 1978 was a DRAM and it ran on 12V, 5V and -5V, but then my second DRAM was using only a 5V supply. Today we see SOCs running under a 1V supply voltage, but there is a totally different market for power devices that are at the other end of the voltage spectrum and they handle switching ranges from 12V – 250V. … Read More