It’s well known that flash is the embedded non-volatile memory (NVM) incumbent technology. As with many technologies, flash is bumping into limits such as power consumption, speed, endurance and cost. It is also not scalable below 28nm. This presents problems for applications such as AI inference engines that require embedded… Read More
Emerging Memories Overview
This year’s Future of Memory and Storage Conference (formerly the Flash Memory Summit) was again very well attended. The Santa Clara Convention Center is definitely the place to be for a Silicon Valley Conference.
This post is about the Emerging Memories session organized by Dave Eggleston. We will be covering other sessions… Read More
WEBINAR: Silicon Area Matters!
When designing IP for system-on-chip (SoC) and application-specific integrated circuit (ASIC) implementations, IP designers strive for perfection. Optimal engineering often yields the smallest die area, thereby reducing both cost and power consumption while maximizing performance.
Similarly, when incorporating embedded… Read More
Design Automation Conference #61 Results
This was my 40th Design Automation Conference and based on my follow-up conversations inside the semiconductor ecosystem it did not disappoint. The gauge I use for exhibitors is “qualified customer engagements” that may result in the sale of their products. This DAC was the best for that metric since the pandemic, absolutely.… Read More
AI-Powered Transformation in EDA
The integration of artificial intelligence (AI) into Electronic Design Automation (EDA) is revolutionizing chip design, addressing the critical shortage of skilled engineers and accelerating the development process. As Jeff Dyck, Senior Director of Engineering at Siemens EDA, explains in a recent DACtv presentation, … Read More
Visualizing Multi-Die Design: Ansys and NVIDIA’s Omniverse Collaboration
In a DACtv session on July 22, 2024, Rich Goldman from Ansys discussed the partnership with NVIDIA, focusing on accelerating engineering simulations and visualizing 3D IC designs in Omniverse. The collaboration, outlined in six pillars defined by NVIDIA CEO Jensen Huang, leverages NVIDIA’s GPUs and Grace CPUs to enhance… Read More
Custom Processor Design with Verification: Insights from Codasip at DAC
At the 62nd Design Automation Conference (DAC) on July 22, 2024, Philip Bena from Codasip delivered a compelling session on processor customization, emphasizing a responsible approach that prioritizes verification. Codasip, a European company with a global presence, offers a unique combination of RISC-V processor IP and… Read More
proteanTecs Introduces a Safety Monitoring Solution #61DAC
At #61DAC it was quite clear that semiconductors have “grown up”. The technology has taken its place in the world as a mission-critical enabler for a growing list of industries and applications. Reliability and stability become very important as this change progresses. An error of failure is somewhere between inconvenient… Read More
CAST, a Small Company with a Large Impact on Many Growth Markets #61DAC
Semiconductor IP has continued to grow as a market, and it was clearly a star performer at #61DAC. We all know the large suppliers of IP for semiconductors, but the market is actually quite diverse, with many players supporting many applications. I had a chance to meet with two executives from CAST, a company with a remarkably … Read More
Perforce IP and Design Data Management #61DAC
I recall first blogging about Helix IPLM (formerly Methodics IPLM) at DAC in 2012, then Perforce acquired the company in July 2020, so I stopped by the Perforce booth this year at DAC to get an update from Martin Hall, Principal Solutions Engineer at Perforce. Martin’s background includes working at Dassault Systemes, Synchronicity,… Read More


Quantum Computing Technologies and Challenges