Semiconductor manufacturing has always depended on precise measurement. As devices become more complex and packaging integrates more components, however, measuring individual process steps is no longer enough. Manufacturers need to understand how decisions across fabrication, assembly, and test affect the finished … Read More
The Wafer Is the New Battleground: Soitec CPO René Jonker on Building AI from the Substrate Up
Most of the AI conversation stops at the chip. At SEMICON West 2026 I sat down with René Jonker, Chief Product Officer of Soitec, to talk about what sits underneath it.
Ask an engineer where AI performance comes from and you will hear about process nodes, dataflow, HBM stacks and interconnect fabrics. Rarely about the wafer. Yet a … Read More
SEMICON West’s Autonomous Fab Vision Needs a Decision-Escalation Design
By Gleb Tsipursky
SEMICON West 2026’s smart-manufacturing agenda connected digital twins, agentic AI, physical AI, and increasingly autonomous factory operations. The final day included a session on automation and equipment for autonomous facilities. At its October CONNECT conference, PDF Solutions planned demonstrations… Read More
Beyond the Post-Mortem: How yieldHUB Live Turns the Test Floor Into an Open Window
At SEMICON West 2026 I sat down with John O’Donnell, founder and CEO, and Gillian O’Donnell, Director of Growth, to talk about how yieldHUB Live is transforming the semiconductor test floor from a blind spot into a real-time command center.
For decades, semiconductor test floors have operated as high-stakes black… Read More
Sir Arthur C. Clarke Deserves a Nobel Prize
By Richard Curtin
Ever since the Silicon Catalyst 2023 Semiconductor Industry Forum (“Welcome to our AI Wonderland”) I’ve been convinced that the Nobel Prize committee needs to consider awarding a posthumous award to Sir Arthur.
To remind you, Sir Arthur’s “2001: A Space Odyssey” movie was released in 1968. At that point in time… Read More
Moving Beyond AI-Assisted Design – Agentrys Shows the Way with Agentic Loop Engineering
At Hot Chips 2026, OpenAI presented Jalapeño, an inference ASIC built with AI in the design loop. As reported from the session by ServeTheHome and Tom’s Hardware, OpenAI showed measured block-level wins over a human baseline — 56% on a BF16 multiply, alongside a 10% smaller matrix-unit area — within a roughly nine-month path from… Read More
TSMC’s AI Expansion Signals a Broader Shift in Computing
TSMC is describing an artificial intelligence boom that reaches beyond accelerator chips into the wider computing infrastructure needed to support increasingly capable AI systems. On the recent investor call, Chairman and CEO Dr. C.C. Wei presents strong demand, persistent supply constraints and an ambitious expansion … Read More
DAC 2027 Opens Call for Contributions as AI Reshapes Chip Design
The Design Automation Conference is the premier semiconductor ecosystem conference. I have attended 43 DACs including the most recent one in Long Beach. My first DAC was in Albuquerque NM. It was a month after my University so i was still in college mode. DAC was quite the celebration back then so I fit right in
I remember conferences… Read More
TSMC 2026 OIP Ecosystem Forum Summary
TSMC’s 2026 Open Innovation Platform Forum presented artificial intelligence as the force reshaping semiconductor design. Its central argument is that faster chips will require progress across the whole system: logic, memory, packaging, interconnects, power delivery and design methods. TSMC places its partner ecosystem… Read More
CASPA CEO Summit and Why it Matters
It’s an honor to attend events like this as a guest, and even more so as a speaker. On Friday at 3:30 p.m., I’ll be moderating a panel with the CEOs of three of the hottest AI startups. I definitely have a few questions ready for them! My beautiful wife and I will also be at the banquet. I hope to see you there!
The CASPA CEO Summit arrives … Read More


Why America’s Semiconductor Manufacturing Capacity Matters