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WP_Term Object
(
    [term_id] => 50
    [name] => Events
    [slug] => events
    [term_group] => 0
    [term_taxonomy_id] => 50
    [taxonomy] => category
    [description] => 
    [parent] => 0
    [count] => 1597
    [filter] => raw
    [cat_ID] => 50
    [category_count] => 1597
    [category_description] => 
    [cat_name] => Events
    [category_nicename] => events
    [category_parent] => 0
    [is_post] => 
)

HBM’s Second Act: When Memory Starts Thinking

HBM’s Second Act: When Memory Starts Thinking
by Admin on 09-08-2026 at 2:00 pm

HBM Base Die Revolution

Samsung’s Hot Chips 2026 presentation, “HBM Base Die: How HBM Will Evolve Using Advanced Logic Processes,” argues that the base die beneath a High Bandwidth Memory stack is about to become far more than a communications layer. Traditionally, an HBM base die mainly connects stacked DRAM dies to a GPU, TPU, or other processor and … Read More


NVIDIA Vera: Rebuilding the CPU for Agentic AI

NVIDIA Vera: Rebuilding the CPU for Agentic AI
by Admin on 09-08-2026 at 10:00 am

No Agent Left Waiting

Source: Jonathon Evans and Polychronis Xekalakis, “NVIDIA Vera CPU,” Hot Chips 2026. Performance figures are NVIDIA claims, and several results were based on preproduction or unofficial testing.

NVIDIA’s Vera CPU is a server processor designed specifically for agentic AI, where language models repeatedly observe, reason,… Read More


ASML and TSMC’s 12-Inch Photomask Initiative: Technical Significance

ASML and TSMC’s 12-Inch Photomask Initiative: Technical Significance
by Daniel Nenni on 09-07-2026 at 11:00 pm

ASML and TSMC’s 12 Inch Photomask Initiative

ASML and TSMC’s proposed shift from 6-inch to 12-inch photomasks is an attempt to redesign a critical but often overlooked part of advanced semiconductor manufacturing. Photomasks are precision plates carrying the circuit patterns projected by a lithography scanner onto a silicon wafer. In extreme-ultraviolet lithography,… Read More


Semicon West: Transforming Tomorrow One Chip at a Time

Semicon West: Transforming Tomorrow One Chip at a Time
by Daniel Nenni on 09-06-2026 at 6:00 am

Semicon West 2026 Transforming Tomorrow One Chip at a Time

SEMICON West 2026 arrives at a pivotal moment for the global chip industry. Scheduled for October 13–15 at San Francisco’s Moscone Center, the event returns to the Bay Area after its 2025 edition in Phoenix. Organized by SEMI under the theme “Transform Tomorrow,” it will bring together semiconductor manufacturers, equipment… Read More


HBM’s Vertical Ascent: Why Packaging Is Becoming the Heart of AI Memory

HBM’s Vertical Ascent: Why Packaging Is Becoming the Heart of AI Memory
by Admin on 09-03-2026 at 6:00 am

HBM’s Vertical Ascent

SK hynix’s Hot Chips 2026 presentation explains how High Bandwidth Memory (HBM) is evolving to meet the extraordinary memory requirements of artificial intelligence. Its central message is that future progress will depend not only on better DRAM circuits but also on advanced packaging, denser vertical integration, improved… Read More


DAC 2026: A Discussion of Who Owns the Intelligence Behind Tomorrow’s Chips and How to Make it Better

DAC 2026: A Discussion of Who Owns the Intelligence Behind Tomorrow’s Chips and How to Make it Better
by Mike Gianfagna on 09-02-2026 at 6:00 am

DAC 2026 A Discussion of Who Owns the Intelligence Behind Tomorrow’s Chips and How to Make it Better

The industry is moving from simple documentation chatbots to agentic workflows capable of performing complex, multi-step tasks like design creation, verification, and library characterization. These agents are intended to enhance engineering productivity by roughly 50%. A panel of industry experts met at DAC to discuss… Read More


GenAlpha Brings a Practical Approach for Analog AI to DAC 2026

GenAlpha Brings a Practical Approach for Analog AI to DAC 2026
by Mike Gianfagna on 08-31-2026 at 10:00 am

GenAlpha Booth

Agentic AI was everywhere at DAC 2026. Various focus areas were presented that covered many parts of the chip design flow. Verification and debug were a popular topic since so much time is spent there. Analog design is another pressure point. Every chip design has analog content. While the size of the analog blocks may not be huge,… Read More


Crescent Island: Turning Memory Capacity into Agentic AI Throughput

Crescent Island: Turning Memory Capacity into Agentic AI Throughput
by Admin on 08-27-2026 at 2:00 pm

Intel Crecesent Island Hot Chips 2026

Intel’s Crescent Island is a discrete data-center GPU designed for agentic AI inference, where performance is constrained by more than matrix arithmetic. Multi-step agents impose latency through repeated model calls and tool interactions, consume large memory capacity for weights and long-context key-value caches, and… Read More


Intel Diamond Rapids: Building Xeon Up, Out, and Through Silicon

Intel Diamond Rapids: Building Xeon Up, Out, and Through Silicon
by Admin on 08-26-2026 at 2:00 pm

Intel Diamond Rapids Hot Chips 2026

Akhilesh Kumar & Krishnakanth Sistla, Intel

Diamond Rapids is Intel’s next-generation Xeon processor, designed around the proposition that hyperscale performance increasingly depends on moving, processing, and protecting data as efficiently as executing instructions. The architecture replaces the conventional… Read More


Bronco AI at DAC 2026, What a Difference a Year Makes

Bronco AI at DAC 2026, What a Difference a Year Makes
by Mike Gianfagna on 08-26-2026 at 6:00 am

Bronco AI at DAC 2026, What a Difference a Year Makes

During my time at DAC 2026 I felt like I was attending two events. One was the traditional DAC where approaches to designing complex chips using the best tools and methodologies were the focus. There was another focus for the conference. This one was like the traditional DAC with an important difference. Here, the discussion centered… Read More