For decades, semiconductor innovation has been constrained not by imagination, but by engineering capacity. While transistor density has continued to advance, the process of building chips has remained fundamentally manual, fragmented across specifications, RTL, verification, debugging, coverage analysis, and signoff.… Read More
Caspia Technologies is pioneering a new, agentic chip and system security approach at DAC 2026
Caspia’s advanced tools and agents blend seamlessly with existing design flows to add expert-level security verification capabilities for all design teams. Founded in 2020 and headquartered in Gainesville, Florida, Caspia brings together expertise in chip design, fabrication, test, and verification with a deep understanding… Read More
Webinar: Caspia Shows You How to Fix Security Flaws Before It’s Too Late
Chip-level vulnerability is becoming an existential threat for virtually all systems. The time to ensure your chip designs are resistant to these attacks is now. Caspia presented a webinar recently that provides important information on how to build attack-resistant chips. If you missed it, don’t worry. A replay link is coming.… Read More
WEBINAR: Why Google Cloud NetApp Volumes Matter for Modern EDA Workloads
In this webinar, Google Cloud and NetApp explore how semiconductor companies can address the growing infrastructure demands of modern Electronic Design Automation (EDA) workflows. As process technologies continue to advance and chip designs become increasingly complex, engineering teams require scalable, high-performance… Read More
How to Free Yourself from Inconsistent Engineering Documentation Before It’s Too Late
Embedded systems programs often fail because critical engineering documentation drifts out of alignment over time and distance. This results in a team that is correctly following the wrong instructions. All forms of engineering documentation suffer from this problem, and it really is the silent killer of many programs.
llmda.ai… Read More
How Samtec Blazes a Trail to 224/448 Gbps at DesignCon 26
I recently covered what Samtec was doing at DesignCon 26. Samtec has a tendency to dominate any show it attends in multiple dimensions. The prior post focused on the company’s contributions to the technical agenda and the high-profile experts in attendance. While all that is interesting and valuable, attending a large show like… Read More
Webinar: Faster Design Spec to Implementation using IP-XACT
As SoC design flows grow increasingly complex, IP-XACT has become a cornerstone standard throughout the entire development lifecycle: from architecture specification to design assembly and verification. Its growing adoption is reflected in the standard’s continuous evolution, from the 2009 release through 2014… Read More
WEBINAR: Engineering Documentation is a Critical Source of Truth – Do You Know if it’s Accurate?
Embedded systems programs rarely fail because of a lack of execution capability. They fail because critical engineering documentation drifts out of alignment over time and distance. Simply put, the team is correctly following the wrong instructions. This includes requirements, architecture, implementation, verification,… Read More
What’s New at the 2026 DAC Exhibits
The most common question that I get each year at DAC is, “So, what’s new?” When I reviewed the exhibitor list I was pleasantly surprised to see how many EDA, IP and AI companies were attending that I didn’t know about. Here’s just a quick preview of what to expect in Long Beach from July 27-29. I’ll… Read More
A Look at the High-Profile Speakers Presenting at #DAC2026
Many of us think of DAC as an important trade show for the Semiconductors and EDA industries. That is certainly part of the history of DAC, but the event is also a highly prestigious technical conference dating back to 1964. In fact, the exhibits at DAC began 20 years after the conference started. That long history as a premier technical… Read More


The Packaging PDK Is the Missing Layer for Co-Packaged Optics