Senior Validation Engineer

What You’ll Do

• Characterize analog blocks and perform PHY/Link Layer/Protocol compliance against several industry standards such as PCIe and Ethernet
• Bring up silicon, debug issues, present test results, and create validation reports
• Define test plans and develop test methodologies for various tests
• Develop and standardize test scripts for several tests and automate test equipment
• Determine equipment and accessories needs for various tests
• Study signal integrity and power integrity for evaluation boards and for silicon

What You’ll Need

• Bachelor’s degree in Engineering Science, Electrical and Computer Engineering or Computer Science is at a minimum
• Strong knowledge in multiple specifications such PCIe (Gen1 to Gen6), IEEE 100G CK (C2M, CR, KR), and OIF 100G CEI (VSR, MR, LR), etc.
• Strong programming skills in Python, Perl, Matlab, C/C++, or other scripting languages
• Proficiency in using and automating test instruments such as Scope, BERT, Logic Analyzer/Exerciser, VNA, Power Supplies and Multimeters, etc.
• Strong understandings of SerDes architecture (NRZ, PAM4) and theory of operation: PLL, CDR, CTLE, FFE, DFE, etc.
• Experience in using compliance software such as SIGTEST, SEASIM, COM, etc.
• Experience in PCB design and good understandings of signal integrity, insertion loss, return loss, TDR
• 5+ years experience in SerDes related electrical validation
• Working experience with PCIe and Ethernet protocol layers is a definite plus
• Good understanding of design blocks like MAC and PCS is a plus
• 1+ years of experience in optical and die2die validation is a plus
• Experience in Mango Database, HTML, JavaScript for data post processing and analysis is a plus

“Hybrid work environment”

As part of our commitment to the well-being and satisfaction of our employees, we have designed a comprehensive benefits package that includes:

• Great compensation package
• Health Insurance
• Retirement Savings
• Paid time off