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by Admin on 05-03-2023 at 11:53 am

Job Description

  • Understanding the Bus/clock/power architecture
  • Integrating of multiple sub-systems to Modem Top
  • Running Synthesis/Lint/LEC/other Integrations flows
  • Analyzing the overall system for optimizations
  • Participating System-level analysis for Optimized structure
  • Identifying the system level verification scenarios
  • Debugging/Fixing the complex issues.
  • Experience in PACDC, RDC is plus.
  • Experience in RTL design & Integration of Base-band or any complex SOC architectures
  • Experience in analyzing & debugging complex architectures
  • Hands on system-level verification is Plus
  • In-depth knowledge in Linting/Synthesis/Timing Analysis/LEC flows.
  • Excellent analytical, Programming and debugging skills.


  • RTL design/integration
  • System-level verification
  • Timing-Analysis
  • Lint
  • LEC Flows
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