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WAVE-J: Redefining High-Performance JPEG for the 8K Era

WAVE-J: Redefining High-Performance JPEG for the 8K Era
by Daniel Nenni on 07-29-2026 at 6:00 am

Key takeaways

Wave J JPEC Codec Chips&Media

Chips&Media WAVE-J is a high-performance JPEG codec intellectual property core designed for advanced imaging systems that require very large image support, high throughput, flexible pixel formats, and integrated pre- and post-processing. It succeeds the CODAJ12V architecture while retaining compatibility with established JPEG workflows and significantly expanding performance, configurability, and system-level efficiency.

The core targets 8K-class applications and can encode 8K images at 60 frames per second at 430 MHz and decode 8K images at 60 frames per second at 500 MHz. Depending on chroma format and bit depth, measured throughput reaches approximately 2,950 Mpixels/s for 8-bit 4:0:0 encoding and 2,690 Mpixels/s for 8-bit 4:0:0 decoding. For the widely used 4:2:0 format, performance is approximately 2,060 Mpixels/s for encoding and 2,020 Mpixels/s for decoding. Relative to CODAJ12V, WAVE-J achieves encoding gains of up to 3.5 times and decoding gains of up to 2.7 times.

A major architectural improvement is the transition from a 64-bit AMBA AXI3 interface to a 128-bit AMBA AXI4 interface. Selectable AXI burst lengths of 8, 16, or 32 transactions improve memory-system efficiency and provide better alignment with modern SoC fabrics. Quantization and Huffman tables can be downloaded through either APB or AXI, reducing control-path bottlenecks. A generalized DMA engine also supports operations such as bitstream concatenation for efficiently encoding images rotated by 90 or 270 degrees, as well as constant-value filling.

WAVE-J expands the maximum supported image dimension from 32K × 32K to 64K × 64K. This is particularly valuable for panoramic imaging, digital pathology, aerial mapping, AI datasets, and other workloads that process extremely large still images. Internal memories have been redefined to improve area-to-capacity efficiency, while an optional 28 KB SRAM configuration can be used to increase latency tolerance in memory-constrained or highly contended systems.

The codec supports 8-bit, 10-bit, and 12-bit sample paths across multiple planar and packed formats, including YUV400, YUV420, YUV422, YUV444, RGB, and ARGB. Integrated bit conversion enables 10-bit input or output handling even when the JPEG processing path uses 8-bit or 12-bit representations. The pre- and post-processing pipeline supports fixed-ratio downscaling by 1/2, 1/4, 1/8, 1/16, or 1/32, chroma-format conversion, color-space conversion, arbitrary cropping, mirroring, and rotation support appropriate to the encoder or decoder path. These functions reduce the need for separate image-processing accelerators and minimize external-memory traffic.

Submodule throughput has been improved substantially. Pre- and post-processing performance is approximately 3.2 times higher, transform and quantization throughput is doubled, variable-length coding improves by roughly two to four times, and variable-length decoding improves by up to 2.5 times. Entropy processing has also been refined around 8 × 8 block-based operation, increasing sustained throughput and reducing performance degradation for vertically oriented images.

The design uses a single externally supplied codec clock, with internal clock gating for encoder and decoder domains. In a TSMC 7 nm SVT implementation at 500 MHz, estimated total power is approximately 18.75 mW during encoding and 14.80 mW during decoding for an 8-bit codec configuration with pre- and post-processing enabled. Depending on configuration, the implementation occupies roughly 0.05 to 0.1 mm². A full-featured configuration is estimated at about 1.03 million logic gates, 16.64 KB of SRAM, and 1.33 million total gate equivalents.

Configuration options allow implementers to select encoder-only, decoder-only, or combined codec functionality, choose 8-bit or 12-bit processing, enable only required preprocessing features, and balance memory capacity against latency tolerance. This modularity helps control silicon area and power across products. Although the full WAVE-J configuration is larger than CODAJ12V, the increased gate count delivers substantially greater throughput and broader functionality, improving performance per integrated imaging task and simplifying SoC integration for demanding next-generation imaging platforms.

Bottom line: WAVE-J is positioned for smartphones, cameras, surveillance systems, AI servers, edge devices, appliances, and other platforms requiring high-speed JPEG processing. Its combination of 8K60 performance, large-image capability, modern AXI connectivity, broad format support, and integrated image-processing functions makes it suitable as a compact imaging subsystem rather than merely a standalone JPEG engine.

Also Read:

WAVE-P: Hardware Acceleration for the APV Professional Video Codec

Chips&Media Strengthens Codec Leadership With Next-Gen AV2 Licensing Deal

Chips&Media’s Next-Generation Video CODEC IP Powers Ambarella’s Expanding Edge AI Portfolio

 

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