Xilinx’s Mixed Signal FPGA

Xilinx’s Mixed Signal FPGA
by Luke Miller on 01-28-2014 at 10:00 am

Something in all the Xilinx chatter of UltraScale 20nm, 16nm, having massive amounts of Gigabit transceivers, DSP blocks, RAM, HLS, Rapid Design Closure gets lost… and that is Xilinx’s ability for Mixed Signals. I do not mean when you are talking with the wife (Remember Listen!), but a wonderful block that lives within… Read More