Happy Birthday Xilinx

Happy Birthday Xilinx
by Luke Miller on 02-14-2014 at 4:00 pm

I have never done this before, wished a company happy birthday. So here goes, Happy Birthday Xilinx! How does it feel to be 30? Looking good eh? Signing up for AARP? My family and I just sang and had cake and ice cream. They did look at me like I was nuts when I set a place at the table for a Xilinx FPGA. In all seriousness, over the years Xilinx… Read More


Xilinx, the University of FPGA

Xilinx, the University of FPGA
by Luke Miller on 01-13-2014 at 8:00 pm

More than ever, FPGA training is the key to success. Which is why Xilinx, provides free, no charge video’s that can speak to the seasoned FPGA designer or to the interested community. These Videos are not like your high school graduation taped by Uncle Frank. These are detailed, professionally edited Xilinx Videos that will give… Read More


Get into a Xilinx FPGA for Under $90

Get into a Xilinx FPGA for Under $90
by Luke Miller on 12-27-2013 at 6:30 pm

Jump into Xilinx Programmable Logic today! I wanted to encourage my dear readers if you have not tried using an Xilinx FPGA (Field Programmable Gate Array) or even CPLD (Complex Programmable Logic Device) then it is worth your time to begin your evaluation. Maybe you got one for Christmas? If not, it is easier than you think to start… Read More


Xilinx Pulls Back the 20nm UltraScale Curtain

Xilinx Pulls Back the 20nm UltraScale Curtain
by Luke Miller on 12-12-2013 at 10:00 am

This week Xilinx has announced that “The Xilinx 20nm All Programmable UltraScale™ portfolio is now available with detailed device tables, product documentation, design tools and methodology support.”

Do you know what 20nm is? It’s small, tiny. Think about it this way, as I just learned today that one nanometer is about as long… Read More


Xilinx’s Vivado HLS Will Float Your FPGA

Xilinx’s Vivado HLS Will Float Your FPGA
by Luke Miller on 09-23-2013 at 8:30 pm

Very rarely does the FPGA designer, especially with respect to RADAR, think of the FPGA as a floating point processor. Just to be sure I asked my 6 year old and she agreed. But you know what, the Xilinx FPGAs float. Go try it, order some up and fill up the tub.

Anyways I purpose a duel to the avid VHDL coder. I want you to design me a Sine(x) … Read More


Xilinx: Hide the RTL

Xilinx: Hide the RTL
by Paul McLellan on 04-16-2013 at 7:30 pm

Tom Feist of Xilinx presented here at the GlobalPress Electronics Summit about their strategy to take design abstraction up another level. In the SoC world, we are still pretty much stuck at the RTL level and have moved to higher abstractions by using an IP strategy. But at least all IC designers are RTL-literate.


Xilinx, in the Vivado… Read More