Workshop: ASIC Design using OpenROAD

Workshop: ASIC Design using OpenROAD
by Admin on 04-03-2023 at 3:32 pm

Join us for a free, half-day workshop on the key concepts of an ASIC design physical implementation flow using OpenROAD.  OpenROAD delivers a fast, barrier-free, and low-cost RTL-to-GDS, no-human-in-loop flow for design above 12nm and is one of the tools students can work with in UCSC Silicon Valley Extension VLSI EngineeringRead More