When pushing the boundaries of power and performance in leading edge memory designs, yield is always an issue. The only way to ensure that memory chips will yield is through aggressive simulation, especially at process corners to predict the effects of variation. In a recent video posted on the Solido website, John Barth of Invecas… Read More
Webinar: Designing for Six Sigma: Electronics Simulation Powered by Parametric Variation
Join us to learn more about a novel simulation-driven approach involving models to simulate the behavior of integrated circuits enabling engineers to evaluate and optimize performance. The webinar will showcase two product integrations for electronics applications that aim to achieve a six-sigma level of quality through
