Use Existing High Speed Interfaces for Silicon Test

Use Existing High Speed Interfaces for Silicon Test
by Tom Simon on 03-14-2022 at 6:00 am

High Speed Test Access

The growth of complexity for silicon test as it relates to test data volume and test times is driven by multiple concurrent factors. One dimension is simply the increase in silicon complexity. However, other factors are playing a role as well. These include higher reliability requirements for new applications such as automotive,… Read More


What’s Testing Design Limits at ITC?

What’s Testing Design Limits at ITC?
by Beth Martin on 10-02-2015 at 12:00 pm

The 46[SUP]th[/SUP] IEEE International Test Conference (ITC) will be held the week of October 5, 2015 at the Disneyland Hotel Conference Center in Anaheim, California. ITC is where you will discover the latest ideas and learn about practical applications of test technologies.

As you take in panels, tutorials, presentations,… Read More


EDA Vendors Providing Secure Remote Support for an IC Design Flow

EDA Vendors Providing Secure Remote Support for an IC Design Flow
by Daniel Payne on 01-05-2012 at 5:38 pm

In my last corporate EDA job I had customers in Korea that were evaluating a new circuit simulator and getting strange results. When I asked, “Could you send me your test case?” the reply was always, “No, we cannot let any of our IC design data leave the building because of security concerns.”… Read More