Our previous Blue Pearl post looked at the breadth of contextual visualization capability in the GUI to speed up debug. Two other important aspects of the ASIC & FPGA pre-synthesis workflow are automating analysis with scripts and managing the stream of messages produced. Let’s look at these aspects… Read More
Engaging with the semiconductor ecosystem is critical to surviving in the fast paced times we work in. Face to face interaction at all levels is key and semiconductor IP is a prime example. How do you ensure that your IP meets objective quality requirements before integration into your SoC, and that your SoC is ready for handoff to… Read More
For many, maybe most, big designs, Apache’s RedHawk is the signoff tool for analyzing issues around power: electromigration, power supply droop, noise, transients and so on. But the latest designs have some issues: they are enormous (so you can’t just analyze them naively any more than you can run a Spice simulation… Read More
