In a compelling keynote at the RISC-V Summit North America 2025, Jeremy Dahan from AWS explored the challenges of embedded systems development and how cloud technologies can bridge the gap between local hardware tinkering and scalable, shareable environments. Drawing from his experience as an engineer, Dahan highlighted … Read More
Tag: risc-v
Navigating SoC Tradeoffs from IP to Ecosystem
Building a complex SoC is a risky endeavor that demands careful planning, strategic decisions, and collaboration across hardware and software domains. As highlighted in Darren Jones’ RISC-V Summit presentation from Andes Technology, titled “From Blueprint to Reality: Navigating SoC Tradeoffs, IP, and Ecosystem,”… Read More
S2C, MachineWare, and Andes Introduce RISC-V Co-Emulation Solution to Accelerate Chip Development
MachineWare, and Andes Technology today announced a collaborative co-emulation solution designed to address the increasing complexity of RISC-V-based chip design. The solution integrates MachineWare’s SIM-V virtual platform, S2C’s Genesis Architect and Prodigy FPGA Prototyping Systems, and Andes’ high-performance… Read More
5 Lessons the Semiconductor Industry Can Learn from Gaming
By Kamal Khan
The semiconductor world has always been the beating heart of tech innovation, powering everything from our smartphones to the latest AI breakthroughs. However, as chip complexity increases and market demands accelerate, adherence to traditional development cycles may be stagnating design teams and slowing … Read More
Demand Meets Design: RISC-V and the Next Wave of AI Hardware
Artificial intelligence (AI) is transforming every layer of computing, from hyperscale data centers training trillion-parameter models to battery-powered edge devices performing real-time inference. Hardware requirements are escalating on every front: compute density is increasing, power budgets are tightening, … Read More
Podcast EP309: The State of RISC-V and the Upcoming RISC-V Summit with Andrea Gallo
Daniel is joined by Andrea Gallo, CEO of RISC-V International. Before joining RISC-V he worked in leadership roles at Linaro for over a decade and before Linaro he was a fellow at STMicroelectronics.
Dan explores the current state of the RISC-V movement with Andrea, who describes the focus and history of this evolving standard.… Read More
Yuning Liang’s Painstaking Push to Make the RISC-V PC a Reality
At Embedded World 2025 in Nuremberg, Germany, on March 11, 2025, Yuning Liang, DeepComputing Founder and CEO walked onto the stage with a mischievous smile and a challenge. “What’s the hardest product to make?” he asked rhetorically. “A laptop. It’s bloody hard… but we did it. You can swap the motherboard, you can upgrade, you can’t… Read More
SiFive Launches Second-Generation Intelligence Family of RISC-V Cores
SiFive, founded by the original creators of the RISC-V instruction set, has become the leading independent supplier of RISC-V processor IP. More than two billion devices already incorporate SiFive designs, ranging from camera controllers and SSDs to smartphones and automotive systems. The company no longer sells its own chips,… Read More
Beyond Von Neumann: Toward a Unified Deterministic Architecture
By Thang Tran
For more than half a century, the foundations of computing have stood on a single architecture: the Von Neumann or Harvard model. Nearly all modern chips—CPUs, GPUs, and even many specialized accelerators—rely on some variant of this design. Over time, the industry has layered on complexity and specialization to… Read More
Beyond Traditional OOO: A Time-Based, Slice-Based Approach to High-Performance RISC-V CPUs
For decades, high-performance CPU design has been dominated by traditional out-of-order (OOO) execution architectures. Giants like Intel, Arm, and AMD have refined this approach into an industry standard—balancing performance and complexity through increasingly sophisticated schedulers, speculation, and runtime … Read More
