AI-Driven Verification: Transforming Semiconductor Design

AI-Driven Verification: Transforming Semiconductor Design
by Admin on 08-01-2025 at 8:00 am

DAC 62 Systems on Chips

In a DACtv session on July 9, 2025, Abhi Kolpekwar, Vice-President & General Manager at Siemens EDA, illuminated the transformative role of artificial intelligence (AI) in addressing the escalating challenges of semiconductor design verification. The presentation underscored the limitations of traditional methods… Read More


Siemens Proposes Unified Static and Formal Verification with AI

Siemens Proposes Unified Static and Formal Verification with AI
by Bernard Murphy on 07-23-2025 at 6:00 am

Siemens Proposes Unified Static and Formal Verification with AI min

Given my SpyGlass background I always keep an eye out for new ideas that might be emerging in static and formal verification. Whatever can be covered through stimulus-free analysis reduces time that needn’t be wasted in dynamic analysis, also adding certainty to coverage across that range. Still, advances don’t come easily. … Read More


Revolutionizing Simulation Turnaround: How Siemens’ SmartCompile Transforms SoC Verification

Revolutionizing Simulation Turnaround: How Siemens’ SmartCompile Transforms SoC Verification
by Kalar Rajendiran on 07-08-2025 at 10:00 am

SmartCompile

In the race to deliver ever-larger SoCs under shrinking schedules, simulation is becoming a bottleneck. With debug cycles constrained by long iteration times—even for minor code changes—teams are finding traditional flows too rigid and slow. The problem is further magnified in continuous integration and continuous deployment… Read More