Relationships with IP Vendors

Relationships with IP Vendors
by Daniel Nenni on 11-21-2024 at 10:00 am
Categories: Andes Technology, EDA, IP, RISC-V, Siemens EDA

An animated panel discussion Design Automation Conference in June offered up a view of the state of RISC-V and open-source functional verification and a wealth of good material for a three-part blog post series.

Parts One and Two covered a range of topics from microcontroller versus more general-purpose processor versus running… Read More

Podcast: Will Arm Risk RISC-V?

Podcast: Will Arm Risk RISC-V?
by Daniel Nenni on 06-15-2022 at 6:00 am
Categories: Uncategorized

What’s at stake? A candid discussion between Junko Yoshida, Editor in Chief of the Ojo-Yoshida Report, and Frank Lin, CEO of Andes.

Will Arm RISC-V? from the Ojo-Yoshida Report

Andes Technology, a Taiwanese CPU core IP company, began phasing out its proprietary processing architecture in favor of RISC-V in 2015, as it prepared… Read More