This is the first time in 28 years of my visits to DAC that I have seen so many different technologies arrive at DAC in the same year. Earlier we would have one or possibly two innovative breakthroughs in semiconductors and embedded systems that emerged at DAC. This year I expect six or may be seven to arrive, and I am not including the… Read More
Tag: Mirabilis
Mirabilis Invites System Architects at DAC 2023 in San Francisco
System architects have a difficult task of choosing the most efficient architecture by exploring alternative approaches, while tracking and testing requirements. Using a Model-Based Systems Engineering (MBSE) approach is recommended to achieve these goals, before getting mired in low-level implementation details like… Read More
Mapping SysML to Hardware Architecture
The Systems Modeling Language (SysML) is used by systems engineers that want to specify, analyze, design, verify and validate a specific system. SysML started out as an open-source project, and it’s a subset of the Unified Modeling Language (UML). Mirabilis Design has a tool called VisualSim Architect that imports your… Read More
System-Level Modeling using your Web Browser
I’ve simulated IC designs at the transistor-level with SPICE, gate-level, RTL with Verilog, and even used cycle-based functional simulators. Sure, they each worked well, but only for the domain and purpose they were designed for. Industry analyst, Gary Smith predicted that the IC world would soon move to system-level… Read More