Verifying ESD Fixes Faster with Incremental Analysis

Verifying ESD Fixes Faster with Incremental Analysis
by Tom Simon on 08-23-2018 at 12:00 pm

The author of this article, Dündar Dumlugöl, is CEO of Magwel. He has 25 years of experience in EDA managing the development of leading products used for circuit simulation and high-level system design.

Every designer knows how tedious it can be to shuttle back and forth between their layout tool and analysis tools. Every time an… Read More


Webinar on TFT and FPD Design

Webinar on TFT and FPD Design
by Daniel Payne on 05-11-2017 at 12:00 pm

I knew that the acronym for TFT meant Thin Film Transistors, but I hadn’t heard that FPD stands for Flat Panel Detectors. It turns out the FPD are solid-state sensors used in x-ray applications, similar in operation to image sensors for digital photography and video. I’ll be attending and blogging about what I learn… Read More


Blitz, blazing fast layout

Blitz, blazing fast layout
by Paul McLellan on 11-29-2011 at 8:00 am

Image RemovedOne of the challenges with today’s SoCs is that chip-finishing, putting the final touches to the SoC working at the chip level, stresses layout editors to the limit. Either they run out of capacity to load the entire chip, or they can handle the entire chip but everything is like wading through molasses, it takes… Read More