Efficient Power Analysis and Reduction at RTL Level

Efficient Power Analysis and Reduction at RTL Level
by Pawan Fangaria on 07-22-2013 at 12:30 am

It’s a classic and creative example of design and EDA tool community getting together, exploiting tool capabilities and developing flows which add value to all stake holders including the end consumer. We know power has become extremely important for battery life in smart phones, high performance servers, workstations, notebooks… Read More