SoC designs use many levels of design abstraction during their journey from ideation to implementation, and now it’s possible to perform power analysis quite early in the design process. I had a call with William Ruby, Director of Porduct Marketing – Synopsys Low Power Solution to hear what they’ve engineered… Read More
Tag: fusion compiler
The Easy Path to Maximum Performance-per-Watt on Arm® Neoverse™ Cores With Fusion Compiler
Arm’s family of Neoverse™ cores – the latest of which, the Neoverse N2 and V1 – target high-end infrastructure applications and are set to play a central role in the next generation of data center, high-performance computing (HPC), 5G and AI SoCs. Extracting the maximum performance-per-watt for SoCs targeting these applications… Read More
Top Three Reasons to Attend the Synopsys Fusion Compiler Event!
As a professional semiconductor event attendee I can pretty much tell if an event will be successful by looking at the agenda. What I look for is simple, customer presentations. Not company presentations or partner presentations but actual customer case studies presented by name brand companies. For this event Google, Intel,… Read More
Synopsys Fusion Compiler Delivers ARM Hercules-Samsung 5LPE Design
There were many interesting presentations at ARM TechCon this year besides the keynote addresses by Arm, which were truly stunning for content and production value. One very interesting presentation was the talk given in the afternoon of Wednesday, October 9, 2019, titled, Synopsys Fusion Compiler for Next Generation Arm Hercules… Read More
Fusion Synthesis for Advanced Process Nodes
Synopsys recently unleashed Fusion Compiler™, a new RTL-to-GDSII product that enables a data-driven design implementation by revamping Design Compiler architecture and leveraging the successful Fusion Technology –seamlessly fusing the logical and physical realms to produce predictable QoR. It is a long-awaited… Read More