CadenceTECHTALK: Increase Efficiency and Reduce Risks with IC and Package Co-Design Flows – EMEAI
EMEAI Session
Date: Tuesday, June 14, 2022
Time: 09:00 BST / 10:00 CEST / 11:00 EEST and Israel / 13:30 IST
System designers face increasing challenges to meet technical specification and time-to-market requirements. While process nodes continue to shrink, the complexity of packages continue to grow. Large pin counts of flipped