Webinar Replay on TileLink from Truechip

Webinar Replay on TileLink from Truechip
by Tom Simon on 11-24-2020 at 10:00 am

TileLink

The extremely popular RISC-V instruction set architecture (ISA) originally came from the Berkeley Architecture Research (BAR) group. BAR also developed several other key pieces of enabling technology that have helped RISC-V become so popular. Among these are Rocket Chip which serves as a RISC-V based SOC generator. It can … Read More


Synopsys is Changing the Game with Next Generation 64-Bit Embedded Processor IP

Synopsys is Changing the Game with Next Generation 64-Bit Embedded Processor IP
by Mike Gianfagna on 04-07-2020 at 6:00 am

ARC HS5x HS6x block diagram

Synopsys issued a press release this morning that has some important news – Synopsys Introduces New 64-bit ARC Processor IP Delivering Up to 3x Performance Increase for High-End Embedded Applications. At first glance, one could assume this is just an announcement for some new additions to the popular ARC processor family. While… Read More


Netspeed and NSITEXE talk about automotive design trends at 55DAC

Netspeed and NSITEXE talk about automotive design trends at 55DAC
by Tom Simon on 08-02-2018 at 12:00 pm

DAC is where both sides of the design equation come together for discussion and learning. This is what makes attending DAC discussion panels so interesting; you are going to hear from providers of tools, methodologies and IP as well as those who need to use them to deliver working solutions. There are few places where the interplay… Read More